A light-emitting device includes: a substrate; first column portions provided at the substrate; a plurality of second column portions provided at the substrate and that surround the first column portions as viewed from a normal direction of the substrate; a first semiconductor layer coupled to the first column portions; an insulating layer covering the first semiconductor layer and the second column portions; and a wiring line electrically coupled to the first semiconductor layer. Each of the first column portions and each of the second column portions includes an n-type second semiconductor layer, a p-type third semiconductor layer, and a u-type fourth semiconductor layer. The fourth semiconductor layer at each of the first column portions is injected with current to emit light. The fourth semiconductor layer at each of the second column portions is not injected with current. The wiring line overlaps at least one of the second column portions.

Provided here are: semiconductor layers comprised of an n-type cladding layer formed on a surface of an n-type GaAs substrate, active layers formed on surfaces of the n-type cladding layer, p-type cladding layers formed on surfaces of the active layers, and p-type contact layers formed on surfaces of the p-type cladding layers, the p-type cladding layers and the p-type contact layers being formed to have a ridges; insulating films covering surfaces of the semiconductor layers but having openings on surfaces of the p-type contact layer; and conductive layers connected to the p-type contact layers through the openings, the conductive layers being formed on surfaces of the insulating films to cover planar portions provided in the semiconductor layers adjacently to the ridges; wherein, together with the conductive layers, convex sidewalls are provided to be placed over portions of the planar portions at their sides nearer to the ridges.

An optoelectronic device includes a base chip, including a silicon die having a photodiode disposed at its front surface and a first anode contact and a first cathode contact disposed on the front surface. A laser diode driver circuit on the silicon die supplies an electrical drive signal between the first anode contact and the first cathode contact. An emitter chip includes a III-V semiconductor die, which is mounted with its front side facing toward the front surface of the silicon die. A second anode contact and a second cathode contact are disposed on the front side of the III-V semiconductor die in electrical communication with the first anode contact and the first cathode contact. A VCSEL is disposed on the front side of the III-V semiconductor die in coaxial alignment with the photodiode and receives the drive signal from the second anode contact and the second cathode contact.

A light emitting element according to the present disclosure includes a first light reflecting layer 41, a laminated structure 20, and a second light reflecting layer 42 laminated to each other. The laminated structure 20 includes a first compound semiconductor layer 21, a light emitting layer 23, and a second compound semiconductor layer 22 laminated to each other from a side of the first light reflecting layer. Light from the laminated structure 20 is emitted to an outside via the first light reflecting layer 41 or the second light reflecting layer 42. The first light reflecting layer 41 has a structure in which at least two types of thin films 41A and 41B are alternately laminated to each other in plural numbers. A film thickness modulating layer 80 is provided between the laminated structure 20 and the first light reflecting layer 41.

In some implementations, a vertical cavity surface emitting laser (VCSEL) array may include a substrate. In some implementations, the VCSEL array may include a set of cathodes disposed on the substrate in a first direction, wherein a cathode, of the set of cathodes, is defined by a serpentine shape. In some implementations, the VCSEL array may include a set of anodes disposed on the substrate in a second direction, wherein an anode, of the set of anodes, is defined by the serpentine shape.

The invention relates to a process for fabricating a semiconductor diode (1) via transfer of a semiconductor stack (20) then local etching to form a semiconductor pad (30), the production of the semiconductor pad (30) comprising a plurality of sequences comprising a dry etch that leaves a residual segment (23.1; 22.1), formation of a hard-mask spacer (42.1; 43.1), then a wet etch of the residual segment (23.1; 22.1).

Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.

A laser structure may include a substrate, an active region arranged on the substrate, and a waveguide arranged on the active region. The waveguide may include a first surface and a second surface that join to form a first angle relative to the active region. A material may be deposited on the first surface and the second surface of the waveguide.

In some implementations, a thermally-controlled photonic structure may include a suspended region that is suspended over a substrate; a plurality of bridge elements connected to the suspended region and configured to suspend the suspended region over the substrate, where a plurality of openings are defined between the plurality of bridge elements; and at least one heater element having a modulated width disposed on the suspended region. The at least one heater element having the modulated width may include at least one section of a greater width and at least one section of a lesser width. The at least one section of the greater width may be in alignment with an opening of the plurality of openings and the at least one section of the lesser width may be in alignment with a bridge element of the plurality of bridge elements.

A bottom-emitting multijunction VCSEL array includes a first reflector region, a multijunction active region, and a second reflector region. In one aspect, the multijunction VCSEL array is attached to a submount by flip-chip bonding. In another aspect, the multijunction VCSEL array further includes a contact layer formed between the first reflector region and the substrate. The multijunction VCSEL array is attached to a submount by flip-chip bonding.