A protective device includes a first fuse circuit, an overvoltage protection circuit, and a second fuse circuit. The first fuse circuit interrupts a flow of a line current from a voltage terminal to the electrical load when an intensity of the line current reaches a first current intensity limit value. The overvoltage protection circuit electrically connects poles of the voltage terminal when a first voltage limit value of a voltage is reached on the first fuse circuit to force the line current to reach the first current intensity limit value. The second fuse circuit activates the overvoltage protection circuit when a second voltage limit value of a voltage on the second fuse circuit is reached to electrically connect the poles of the voltage terminal. The second voltage limit value is based at least in part on a nominal voltage of the electrical load.

A circuit breaker includes a monitor to detect a performance of an electrical load in an electrical circuit, a converter to create a digital signal based on the detected performance of the electrical load, and a digital integrated circuit to compare the digital signal with a predetermined threshold reference signal, and generate a command signal to electrically disconnect the electrical load from the electrical circuit when a level of the digital signal exceeds the predetermined threshold reference signal. The electrical load may be configured to receive a fixed or variable amount of current or voltage. The predetermined threshold reference signal may include a signal level threshold and a time threshold. The digital integrated circuit may generate the command signal when the level of the digital signal exceeds the signal level threshold and the detected performance of the electrical load exceeds the time threshold.

A circuit breaker includes a monitor to detect a performance of an electrical load in an electrical circuit, a converter to create a digital signal based on the detected performance of the electrical load, and a digital integrated circuit to compare the digital signal with a predetermined threshold reference signal, and generate a command signal to electrically disconnect the electrical load from the electrical circuit when a level of the digital signal exceeds the predetermined threshold reference signal. The electrical load may be configured to receive a fixed or variable amount of current or voltage. The predetermined threshold reference signal may include a signal level threshold and a time threshold. The digital integrated circuit may generate the command signal when the level of the digital signal exceeds the signal level threshold and the detected performance of the electrical load exceeds the time threshold.

A squib driver circuit for deployment of a deployable restraint in a vehicle. The safety restraint may have a minimum firing voltage. The voltage regulator may regulate the input voltage to be the minimum firing voltage at the input terminal. The squib driver circuit may be formed on a single chip. The squib driver circuit may include a high side driver and a low side driver. An input terminal for receiving an input voltage used to fire the deployable restraint. The high side driver may supply current from the input terminal to the deployable restraint. The low side driver may supply current from deployable restraint to the electrical ground.

A switch control circuit and a battery pack including the same are disclosed. The switch control circuit can include a first controller outputting a first control signal for controlling a driver, and a second controller configured to detect a fault of the first controller and to output a second control signal in response to detecting the fault of the first controller. The switch control circuit can further include first to third buffers each outputting an output signal corresponding to the first control signal or changing an output terminal of each buffer to an open state in response to the second control signal. The switch control circuit can further include a holding circuit holding a previous state of an input signal of the third buffer and a switch circuit transferring the output signal of the second buffer or the third buffer to the driver in response to the second control signal.

A switch control circuit and a battery pack including the same are disclosed. The switch control circuit can include a first controller outputting a first control signal for controlling a driver, and a second controller configured to detect a fault of the first controller and to output a second control signal in response to detecting the fault of the first controller. The switch control circuit can further include first to third buffers each outputting an output signal corresponding to the first control signal or changing an output terminal of each buffer to an open state in response to the second control signal. The switch control circuit can further include a holding circuit holding a previous state of an input signal of the third buffer and a switch circuit transferring the output signal of the second buffer or the third buffer to the driver in response to the second control signal.

A power transistor overcurrent protection circuit includes an overcurrent detection circuit, a timing control circuit, and an enable control circuit. The overcurrent detection circuit is configured to detect whether there is an overcurrent flowing in the controlled power transistor. The timing control circuit and the enable control circuit jointly control the controlled power transistor. The power transistor overcurrent protection circuit can turn off the controlled power transistor so as to protect the controlled power transistor when there is an overcurrent flowing in the controlled power transistor for controlling a load to work or not to work.

A power transistor overcurrent protection circuit includes an overcurrent detection circuit, a timing control circuit, and an enable control circuit. The overcurrent detection circuit is configured to detect whether there is an overcurrent flowing in the controlled power transistor. The timing control circuit and the enable control circuit jointly control the controlled power transistor. The power transistor overcurrent protection circuit can turn off the controlled power transistor so as to protect the controlled power transistor when there is an overcurrent flowing in the controlled power transistor for controlling a load to work or not to work.

A fault interrupt module includes a detector circuit, a counter circuit, and a switch circuit. The detector circuit is configured to detect faults as a difference in current between an input power line and a neutral line. The counter circuit configured to increment a fault count each time a fault is detected by the detector circuit, and the switch circuit is configured to terminate power to a load upon the fault count reaching a threshold count within a threshold time period.

A fault interrupt module includes a detector circuit, a counter circuit, and a switch circuit. The detector circuit is configured to detect faults as a difference in current between an input power line and a neutral line. The counter circuit configured to increment a fault count each time a fault is detected by the detector circuit, and the switch circuit is configured to terminate power to a load upon the fault count reaching a threshold count within a threshold time period.