Provided herein are semiconductor dies including multiple controllers for operating over an extended temperature range. In certain embodiments, a semiconductor die includes multiple circuit modules, a temperature sensor that generates a detected temperature signal, an interface that communicates with an external host, a primary controller coupled to the interface and operable to control the circuit modules, and a secondary controller coupled to the interface. In response to the detected temperature signal indicating that the temperature of the semiconductor die exceeds a threshold temperature, the primary controller enables the secondary controller, which in turn disables the primary controller and at least a portion of the plurality of circuit modules to reduce heat dissipation.

An integrated circuit (IC) heater circuit comprises a drive circuit configured to increase the temperature of the IC when consuming power; a temperature sensor coupled to a control node of the drive circuit to activate and deactivate the drive circuit to provide an ambient temperature for the IC, wherein current of the temperature sensor varies with temperature; and a control circuit coupled to the temperature sensor and configured to adjust variation in the temperature sensitivity of the current of the temperature sensor.

A semiconductor device includes a switching element, a control circuit, and a first and second temperature detectors. The control circuit controls the switching element and have an overcurrent detection circuit for the switching element. The first temperature detector detects the temperature of the switching element and the second temperature detector detects the temperature of the control circuit. The control circuit includes a reference correction circuit for correcting an overcurrent reference value of the overcurrent detection circuit on the basis of a first detection value and a second detection value detected by the first and second temperature detectors and outputting a corrected overcurrent reference value.

A semiconductor device 100 has a power transistor N1 of vertical structure and a temperature detection element 10a configured to detect abnormal heat generation by the power transistor N1. The power transistor N1 includes a first electrode 208 formed on a first main surface side (front surface side) of a semiconductor substrate 200, a second electrode 209 formed on a second main surface side (rear surface side) of the semiconductor substrate 200, and pads 210a-210f positioned unevenly on the first electrode 208. The temperature detection element 10a is formed at a location of the highest heat generation by the power transistor N1, the location (near the pad 210b where it is easiest for current to be concentrated) being specified using the uneven positioning of the pads 210a-210f.

An over-temperature protection circuit applied in a motherboard platform includes a first processor, a second processor, and a peripheral circuit. The first processor includes first temperature detection unit, the second processor includes second temperature detection unit. The over-temperature protection circuit includes third temperature detection unit and digital processing unit. The first processor can determine that the motherboard platform is in an over-temperature state through the first temperature detection unit, the second processor can determine that the motherboard platform is in the over-temperature state through the second temperature detection unit, and the digital processing unit can determine that the motherboard platform is in the over-temperature state through the third temperature detection unit. When an over-temperature state is determined by any such means, the first processor controls the motherboard platform to enter a sleep mode.

An over temperature compensation control circuit is coupled to a conversion unit. The over temperature compensation control circuit includes a detection circuit, a temperature control resistor, and a comparison unit. The detection circuit provides a current signal responsive to an input voltage according to a voltage signal responsive to the input voltage of the conversion unit. The temperature control resistor generates a temperature control voltage according to the current signal. The comparison unit compares the temperature control voltage with a reference voltage to generate a control signal. The control signal represents whether a temperature of the conversion unit reaches an over temperature protection point.

An integrated circuit breaker includes a solid state switching module (SSWM) configured to receive and switchable control a line power (LP) for a given phase, and output a first switched power (SP) to a load. A first sensor (LPS) senses LP currents. A second sensor (SPS) senses SP currents. A power module controls operating states of the SSWM based upon LPS and SPS reading(s). The LPS and/or the SPS may also sense temperatures. The power module includes a high voltage domain, isolated from a low voltage domain, that includes a gate driver coupled to the SSWM and a high voltage controller providing drive signals to the gate driver. The low voltage domain includes an LP monitor and an SP monitor that detects anomalous LP and/or SP conditions and communicates error signals to the high voltage domain and to users for reporting, diagnostic, and/or other purposes via an external communications module.

A semiconductor device 100 has a power transistor N1 of vertical structure and a temperature detection element 10a configured to detect abnormal heat generation by the power transistor N1. The power transistor N1 includes a first electrode 208 formed on a first main surface side (front surface side) of a semiconductor substrate 200, a second electrode 209 formed on a second main surface side (rear surface side) of the semiconductor substrate 200, and pads 210a-210f positioned unevenly on the first electrode 208. The temperature detection element 10a is formed at a location of the highest heat generation by the power transistor N1, the location (near the pad 210b where it is easiest for current to be concentrated) being specified using the uneven positioning of the pads 210a-210f.

In accordance with an embodiment, a method includes: monitoring a temperature difference between two double-side cooled (DSC) power modules of a plurality of DSC power modules arranged in stacks of DSC power modules; comparing the temperature difference with a first temperature threshold; detecting a cooling pipe system blockage when the temperature difference is above the first temperature threshold; and after detecting the cooling pipe system blockage, disabling gate driver circuits coupled to the plurality of DSC power modules or operating the DSC power modules in a low-power mode. Each stack includes a plurality of DSC power modules. Each DSC power module has a top surface and a bottom surface, which are each thermally coupled with one or more cooling channels of a cooling pipe system. The two DSC power modules are thermally coupled with a same cooling channel of the one or more cooling channels.

An integrated circuit that may be employed as a smart switch is described herein. In accordance with one embodiment the integrated circuit includes a power transistor coupled between a supply pin and an output pin and further includes a control circuit configured to trigger a switch-on and a switch-off of the power transistor in accordance with an input signal. The control circuit is configured to trigger a switch-off of the power transistor when a load current passing through the power transistor is at or above a predetermined current and a supply voltage received at the supply pin is at or below a predetermined threshold voltage.