A superconducting arcing induction type DC circuit breaker includes a superconducting fault current limiter and an arcing induction type DC circuit breaker connected in series to each other. The arcing induction type DC circuit breaker includes an induction member that has a through-hole, is continuously formed in a 360-degree direction, and has a certain shape and thickness, and an induction needle that protrudes from an inner surface of the induction member toward a center of the induction member. A contact point where an anode and a cathode, which are mechanical contacts, approach from opposite directions and come into contact with each other is formed in the through-hole of the induction member, and the anode and the cathode are separated in a direction far away from each other. The induction needle induces arc generated upon contact opening when the anode and the cathode are separated from each other in the event of system accident of DC power or AC power, and the induction member quenches the induced arc by the flow of the induced arc to ground through a ground line.

A solid-state circuit breaker and breaking method are disclosed. In an embodiment, the solid-state circuit breaker includes a semiconductor switch; a controller, connected to the semiconductor switch; and an energy absorber, connected in parallel with the semiconductor switch. The controller is configured to obtain an equivalent inductance of a circuit of the solid-state circuit breaker upon a fault occurring in a line. Further, upon the equivalent inductance being greater than an inductance estimated value, the controller is configured to set a second current fault threshold. Finally, upon a fault current of the line reaching the second current fault threshold, the semiconductor switch is controlled to execute a closing operation.

A current limiter arrangement limiting an electric current between a first and a second terminal includes a first current limiting device and a second current limiting device arranged between the first and the second terminal. The first and the second current limiting device each include a substrate having a substrate surface area and a substrate thickness, and include a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate. Each of the superconducting sections has a critical current value and the substrate surface areas, the substrate thicknesses and or the coupling surface areas are implemented as a function of the critical current values.

A voltage source converter, for interconnecting electrical networks, comprises a converter structure which includes a terminal for connection to the first electrical network and a terminal for connection to the second electrical network. The converter structure also includes at least one module that is connected between the terminals. The module includes at least one energy storage device and at least one switching element. The energy storage element and switching element are operable to selectively provide a voltage source. The converter structure still further includes an integrated passive fault current limiter that is configured to present a first impedance to a normal current flowing in the voltage source converter during normal operation of the voltage source converter, and is configured to present a second impedance to a fault current flowing in the voltage source converter during a fault condition. The first impedance is lower than the second impedance.

A current-limiting and power-flow control device according to the present invention includes a superconducting current-limiting element including a superconductor, a series capacitor, and a parallel circuit. The series capacitor is connected in series with the superconducting current-limiting element. The parallel circuit includes a reactor connected in parallel with a series circuit including the superconducting current-limiting element and the series capacitor. Accordingly, overcurrent at the time of occurrence of a fault causes transition of the superconductor of the superconducting current-limiting element to the normal conducting state, and thus causes autonomous current-limiting operation of the superconducting current-limiting element. Thus, application of an excessive load across the terminals of the series capacitor due to the aforementioned fault can surely be prevented. Accordingly, unlike the conventional device, it is unnecessary to install an arrester for protection of the series capacitor and the configuration of the current-limiting and power-flow control device can be simplified.

There is described a magnet assembly comprising a superconducting coil, a cryogenic system, a DC voltage source, an SMPS, current leads, and a controller. The cryogenic system comprises a cryostat and is configured to maintain the superconducting coil at an operating temperature below the critical temperature of the superconductor. The DC voltage is source located outside the cryostat. The SMPS is located inside the cryostat and configured to supply power from the DC voltage source to the superconducting coil. The SMPS comprises a voltage step-down transformer having a primary and a secondary winding. The current leads connect the DC voltage source to the SMPS. The controller is configured to cause the SMPS to supply a first amount of power to the magnet in order to ramp up the magnet to operating current, and a second amount of power to the magnet during steady state operation of the magnet, wherein the first amount of power is greater than the second amount of power.

A digital device is provided. The digital device uses three states, including a ground (GND) state, a voltage (VDD) state, and a FLOAT state. On designing a chip, two storage units and a pad circuit are set inside; the pad circuit comprises a current limiter and two switches; and less ports contained are required than the conventional. That is, one port obtains three states. As comparing to the conventional having only two states, the present invention uses the port connected with two storage units in the pad circuit for obtaining the three states; a circuit featuring “pull up” and “pull down” is used to identify the state of connection of the port; and the port determines a plurality of definitions through the three states of GND, VDD and FLOAT. Thus, a pad is saved for reducing the space and cost of the chip.

Provided are a method and apparatus for calculating fault resistance and a current-limiting current of a superconducting fault current limiter. The method includes: calculating a first short-circuit fault current I.sub.n(t) of a power grid short-circuit fault transient circuit; calling an external characteristic model U(I,t), and calculating resistance R.sub.n(t) of a superconducting fault current limiter under the first short-circuit fault current I.sub.n(t); adding the resistance R.sub.n(t) of the superconducting fault current limiter into the power grid short-circuit fault transient circuit, and calculating a second short-circuit fault current I.sub.m(t), where m=n+1; and determining whether an error between the second short-circuit fault current I.sub.m(t) and the first short-circuit fault current I.sub.n(t) is smaller than a preset threshold value, if yes, determining the fault resistance and the current-limiting current of the superconducting fault current limiter to be R.sub.n(t) and I.sub.m(t) respectively; otherwise, I.sub.n(t)=I.sub.m(t), returning for iteration.

A protection system capable of safely quenching a high temperature superconductor (HTS) magnet coil. The protection circuit provides for a frequency loss induced quench design that advances the protection technology for HTS magnet coils and provides a protection system that is capable of quickly distributing the heat energy uniformly in all the coil sections when a localized hot-spot is created.

A passively activated switch system for a high-current coil including a plurality of silicon-controlled rectifiers (SCRs) each electrically coupled to a high-current coil, each SCR electrically coupled in parallel to a fast-acting mechanical switch. A passive voltage detector is responsive to an increase in voltage above a predetermined threshold value indicating a start of an over-current event which closes each of the plurality of SCRs to enable a loop current to create a large electromagnetic force. Each fast-acting switch is responsive to the large electromagnetic force and is configured to close to shunt current from each SCR to prevent damage of at least one of the high-current coils or a system that utilizes a high-current coil, or both.