Patent classifications
H02M1/0006
ISOLATED DRIVER DEVICE AND METHOD OF TRANSMITTING INFORMATION IN AN ISOLATED DRIVER DEVICE
An isolated driver device comprises a first semiconductor die and a second semiconductor die galvanically isolated from each other. The second semiconductor die includes a signal modulator circuit configured to modulate a carrier signal to produce a modulated signal encoding information. A galvanically isolated communication channel implemented in the first semiconductor die and the second semiconductor die is configured to transmit the modulated signal from the second semiconductor die to the first semiconductor die. The second semiconductor die includes: a fault detection circuit configured to detect electrical faults in the second semiconductor die; a logic circuit coupled to the fault detection circuit and configured to assert a modulation bypass signal in response to a fault being detected by the fault detection circuit; and modulation masking circuitry configured to force the modulated signal to a steady value over a plurality of periods of the carrier signal in response to the modulation bypass signal being asserted. The first semiconductor die includes a respective logic circuit sensitive to the modulated signal and configured to detect a condition where the modulated signal has a steady value over a plurality of periods of the carrier signal, and to assert a fault detection signal in response to the condition being detected.
SYSTEMS AND METHODS FOR POWERING DRIVER CIRCUITRY
A method for powering driver circuitry for an upper transistor of a half-bridge switching stage includes (1) selectively charging a boot-strap capacitor via a first voltage source such that a voltage at the boot-strap capacitor remains within a predetermined voltage range, (2) clamping the voltage at the boot-strap capacitor to prevent the voltage at the boot-strap capacitor from exceeding a predetermined maximum value, and (3) electrically powering the driver circuitry at least partially via the boot-strap capacitor.
Gate Drive Voltage Regulation Apparatus and Control Method
A method includes in a first operating mode of a load switch comprising two back-to-back connected transistors, reducing at least one of a first gate-to-source voltage and a second gate-to-source voltage of the two back-to-back connected transistors from a normal gate drive voltage potential to a reduced gate drive voltage potential, and in a second operating mode of the load switch, increasing the at least one of the first gate-to-source voltage and the second gate-to-source voltage of the two back-to-back connected transistors from the reduced gate drive voltage potential to the normal gate drive voltage potential.
Input voltage selecting auxiliary circuit for power converter circuit
Circuits and methods encompassing a power converter that can be started and operated in a reversed unidirectional manner or in a bidirectional manner while providing sufficient voltage for an associated auxiliary circuit and start-up without added external circuitry for a voltage booster and/or a pre-charge circuit—that is, with zero external components or a reduced number of external components. Embodiments include an auxiliary circuit configured to selectively couple the greater of a first or a second voltage from a power converter to provide power to the auxiliary circuit. Embodiments include an auxiliary circuit configured to select a subcircuit coupled to the greater of a first or a second voltage from a power converter to provide an output for the auxiliary circuit. Embodiments include a charge pump including a gate driver configured to be selectively coupled to one of a first voltage node or second voltage node of the charge pump.
Switched capacitor recirculating converter circuits
A converter circuit. In one aspect, the converter circuit includes an input terminal, a first output terminal and a second output terminal, and first, second, third and fourth capacitors coupled to a plurality of switches, where the plurality of switches are arranged to repetitively cycle the first, second, third and fourth capacitors between a first state and a second state to generate first and a second output voltages, where in the first state, the first and second capacitors are connected in parallel with each other and in series with a third capacitor to apply a first fraction of an input voltage at the first output terminal, and in the second state, the first and second capacitors are connected in series with each other and in parallel with the fourth capacitor to apply a second fraction of the input voltage at the second output terminal.
Load drive circuit, motor drive control device, and motor unit
A protection function of an electronic device is realized with a lower cost. A load drive circuit 102 includes: transistors Qa and Qb for protection of an N-channel type connected between a power source terminal P1 and a power source end P7 for driving; an inverter circuit 14 that drives a load based on an input drive control signal Sd, the inverter circuit 14 being disposed between the power source end P7 for driving and a ground potential; and a booster unit 16 including a capacitor C1 having one terminal connected to an output end of the inverter circuit 14, the booster unit 16 generating, across another terminal of the capacitor C1, a voltage exceeding a power source voltage Vdc, and applying the voltage to control electrodes of the transistors Qa and Qb for protection.
Active pull-up and level shifter circuit
An active pull-up circuit which is operated between an upper voltage and a lower voltage and which pulls up an intermediate node to the upper voltage in reaction to an input voltage of the pull-up circuit falling from the upper voltage to an intermediate voltage is described. The pull-up circuit comprises a first transistor having a source terminal coupled to the upper voltage, a drain terminal coupled to the intermediate node and a gate terminal coupled to the input voltage. The pull-up circuit comprises a second transistor having a source terminal coupled to the upper voltage, a drain terminal coupled to the intermediate node and a gate terminal coupled to a control node. In addition, the pull-up circuit comprises control circuitry configured to pull the control node to a voltage level of the intermediate node, subject to the input voltage falling from the upper voltage to the intermediate voltage.
Auxiliary power supply circuit operating within a wide input voltage range
An auxiliary power supply circuit operating within a wide input voltage range has a voltage follower unit and a voltage comparison unit. The voltage follower unit has an electronic switch, a resistor, and a Zener diode. The electronic switch has a first terminal electrically connected to a voltage input terminal of the working voltage conversion circuit, a second terminal electrically connected to a voltage output terminal of the working voltage conversion circuit, and a control terminal. The resistor is electrically connected between the first terminal and the control terminal of the electronic switch. The Zener diode has a cathode electrically connected to the control terminal of the electronic switch. The voltage comparison unit has a detecting terminal electrically connected to the voltage input terminal of the working voltage conversion circuit, and an output terminal electrically connected to the control terminal of the electronic switch.
Gate driver power-saving method for switched-mode power supplies in pulse-skipping mode
Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit—such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween—in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).
Pedestal loop in DC/DC power converter
The present document relates to a power converter configured to generate an output voltage at an output of the power converter. The power converter may comprise a power stage, a modulator circuit, ramp generator circuit, a first feedback circuit, and a second feedback circuit. The power stage may be coupled to the output of the power converter. The modulator circuit may comprise a first input and a second input, and an output of the modulator circuit may be coupled to the power stage. The ramp generator circuit may be configured to generate a ramp signal, and an output of the ramp generator circuit may be coupled to the first input of the modulator circuit. The first feedback loop may be coupled between the output of the power converter and the second input of the modulator circuit.