Patent classifications
H02M1/0025
CONTROL DEVICE OF INVERTER
A control device (2) of an inverter converts electrical power generated by a solar cell (3) into alternating current power connecting to an electric power system (7). The control device includes: an alternating current voltage sensor (14) sensing a system voltage (Vr) of the electric power system; an MPPT executer (23) controlling a direct current voltage (Vdc) applied to the inverter (1) to cause the electrical power output from the solar cell (3) to be a maximum when the direct current voltage (Vdc) is higher than a lower limit (VL); a direct current voltage lower limit calculator 22 reducing the lower limit (VL) when the system voltage (Vr) is lower than a predetermined voltage; and an electrical power controller (25) controlling reactive power based on the system voltage (Vr), the reactive power being output from the inverter (1).
AUTO CALIBRATION METHOD USED IN CONSTANT ON-TIME SWITCHING CONVERTER
An auto calibration method used in switching converters with constant on-time control. The auto calibration method includes: generating a periodical clock signal with a predetermined duty cycle; providing a first voltage and a second voltage to an on-time control circuit to generate an on-time control signal based on the first and second voltage; providing the clock signal and on-time control signal to a logic circuit to generate a switch control signal based on the clock signal and on-time control signal; comparing the duty cycle of the switch control signal with the duty cycle of the clock signal to adjust a calibration code signal; and adjusting circuit parameters of the on-time control circuit in accordance with the calibration code signal.
DEVICE AND METHOD FOR QUASI-RESONANT-MODE VOLTAGE CONTROL OF A SWITCHING CONVERTER
A control device for controlling a switching converter includes a switch controller that generates a control signal with a switching period for controlling switching of a switch of the switching converter and setting a first interval in which a current flows in the switch, a second interval in which energy is transferred onto a storage element of the switching converter, and a third, wait, interval, at the end of the second interval. The duration of the first interval is determined based on a control voltage indicating the output voltage. A pre-distortion stage receives the control voltage and generates a pre-distorted control voltage as a function of the control voltage and a relationship between one of the first and third time intervals and the switching period, wherein the switch controller is configured to control a duration of the first interval based on the pre-distorted control voltage.
MICRO-ELECTRO-MECHANICAL DEVICE HAVING A TILTABLE STRUCTURE, WITH DETECTION OF THE POSITION OF THE TILTABLE STRUCTURE
A micro-electro-mechanical device, wherein a platform is formed in a top substrate and is configured to turn through a rotation angle. The platform has a slit and faces a cavity. A plurality of integrated photodetectors is formed in a bottom substrate so as to detect the light through the slit and generate signals correlated to the light through the slit. The area of the slit varies with the rotation angle of the platform and causes diffraction, more or less marked as a function of the angle. The difference between the signals of two photodetectors arranged at different positions with respect to the slit yields the angle.
CONTROL METHOD AND DEVICE EMPLOYING PRIMARY SIDE REGULATION IN A QUASI-RESONANT AC/DC FLYBACK CONVERTER WITHOUT ANALOG DIVIDER AND LINE-SENSING
A primary-side controlled high power factor, low total harmonic distortion, quasi resonant converter converts an AC mains power line input to a DC output for powering a load, such as a string of LEDs. The AC mains power line input is supplied to a transformer that is controlled by a power switch. A device for controlling a power transistor of a power stage includes a shaper circuit including a first current generator configured to output a first current responsive to a bias voltage signal and to generate a reference voltage signal based on the first current. A bias circuit includes a second current generator configured to output a second current responsive to a compensation voltage signal and to generate the bias voltage based on the second current. An error detection circuit includes a third current generator configured to output a third current responsive to the reference voltage signal and to generate the compensation voltage signal based on the third current. A driver circuit has a first input configured to receive the reference voltage signal and having an output configured to drive the power transistor.
METHOD AND APPARATUS FOR LIMITING INRUSH CURRENT DURING STARTUP OF A BUCK CONVERTER
A method of regulating an output voltage of a buck converter during a startup period in which the buck converter is first enabled includes regulating the output voltage of the buck converter to a reference voltage under current-mode control during a first part of the startup period, and regulating the output voltage of the buck converter to the reference voltage under voltage-mode control during a second, later part of the startup period. The reference voltage ramps up from an initial voltage at the beginning of the startup period to a target voltage at the end of the startup period. Buck converter embodiments are also described.
AVP Combined with DAC Servo
An object of this disclosure is to implement a Buck, Boost, or other switching converter, with a circuit to supply a reference voltage and Adaptive Voltage Positioning (AVP), by means of a servo and programmable load regulation. The reference voltage is modified, achieving a high DC gain, using a servo to remove any DC offset at the output of the switching converter. The correction implemented by the servo is measured, and a programmable fraction of the correction is injected back on either the reference voltage or the output feedback voltage. To accomplish at least one of these objects, a Buck, Boost, or other switching converter is implemented, consisting of an output stage driven by switching logic, with a servo configured between the reference voltage and the control loops of the Buck converter. The AVP function is implemented on either the reference voltage or output feedback voltage.
USB-PD supply interface and associated method
An embodiment of the present disclosure relates to a power supply interface comprising: a converter delivering a first DC voltage; a resistor connected between the converter and an output terminal of the interface delivering a second DC voltage; a first circuit delivering a second signal representative of a difference between the second DC voltage and a voltage threshold when a first signal is in a first state, and at a default value otherwise; a second circuit delivering a third signal representative of a value of a current in first resistor multiplied by a gain of the third circuit, and modifying the gain based on the second signal; and a third circuit configured to deliver a signal for controlling the converter based at least on the third signal.
Power regulator with variable rate integrator
In described examples of a system having a proportional-integral control module, an error signal is produced that is indicative of a difference between a reference signal and an output signal. An integral control signal is produced by integrating the error signal using an integrator time constant value. During a steady state condition, a first integrator time constant value is used. When an undershoot in the output signal is detected, the integrator time constant value is increased to a second time constant value that is larger than the first integrator time constant value during the undershoot condition. The integrator time constant value is reduced to a third integrator time constant value that is less than the first integrator time constant value during a period following the undershoot condition.
Current mode control modulator including ramp signal generator providing slope compensation
A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.