A three-level inverter includes a first semiconductor switching element disposed between a direct-current high potential terminal and an alternating-current output terminal, a second semiconductor switching element disposed between a direct-current low potential terminal, which is paired with the direct-current high potential terminal, and the alternating-current output terminal, first and second reflux diodes which are disposed reverse-parallelly with the first and second semiconductor switching elements, respectively, and a semiconductor circuit which controls gate voltages of the first and second semiconductor switching elements by selectively applying thereto a direct-current intermediate voltage which is given to a direct-current intermediate potential terminal. Inductance elements are connected in series to the first and second reflux diodes, respectively.

A converter comprises a first switching element and a second switching element coupled between an input power source and an output capacitor and an inductor coupled to a common node of the first switching element and the second switching element, wherein the second switching element comprises a first diode and a first switch connected in series between a first terminal and a second terminal of the second switching element and a second diode connected between the first terminal and the second terminal of the second switching element.

A switching mode power converter circuit is disclosed, comprising a first high-side switch and a first low-side switch coupled in series between an input voltage level and a reference voltage level, a second high-side switch and a second low-side switch coupled in series between the input voltage level and the reference voltage level, and a control circuit for controlling switching operation of the first and second high-side switches and the first and second low-side switches. The first high-side switch has a larger on-state resistance than the second high-side switch and the first low-side switch has a larger on-state resistance than the second low-side switch. The control circuit is configured to, during an on-state of the first and second low-side switches, control the second low-side switch to switch to the off-state and control the first high-side switch to switch to the on-state, so that the first high-side switch and the first low-side switch are both in the on-state. The application further relates to a method of operating such switching mode power converter circuit.

Various embodiments of the present application are directed towards a buck converter circuit including a controller circuit. In some embodiments, the buck converter circuit includes a first switching device, a second switching device, an inductor, and a controller. The inductor is electrically coupled to a node at which a source/drain terminal of the first switching device and a source/drain terminal of the second switching device are electrically coupled. The controller is configured to alternatingly change the first switching device between ON and OFF, and further configured to alternatingly change the second switching device between ON and OFF. The first switching device is OFF while the second switching device is ON. The first switching device is partially ON immediately before or after the second switching device transitions between ON and OFF.

Provided is a semiconductor module, including: a first switching device provided in one of an upper arm or a lower arm; a second switching device provided in another of the upper arm or the lower arm; a first diode device provided in parallel with the first switching device; a second diode device provided in parallel with the second switching device; a laminated substrate of which a main surface has two sides extending in a predetermined first direction and a predetermined second direction; and a gate external terminal and an auxiliary source external terminal provided farther toward a negative side of the first direction than the upper arm and the lower arm, and arranged in the second direction.

A method for operating a multi-level bridge power converter of an electrical power system connected to a power grid includes providing a plurality of switching devices of the power converter in an active neutral point clamped topology. The method also includes operating the plurality of switching devices in a plurality of operating states such that current simultaneously flows through at least two parallel recovery paths of the plurality of switching devices during operation of the power converter to minimize a commutation path of the current when at least one diode of the plurality of switching devices recovers, thereby reducing parasitic inductance affecting the recovering antiparallel diode or the switch.

A low power-loss supply circuit minimizes the losses in a synchronous rectifier power conversion circuit by regulating the voltage supply (Vcc) of a synchronous rectifier controller. The low power-loss supply circuit uses two regulating capacitors to regulate the value of the voltage supplied to the controller. A first regulating capacitor supplies the input voltage which powers the synchronous rectifier controller. A second regulating capacitor is used to cyclically charge the first regulating capacitor.

A voltage transformer comprising a first input terminal and a second input terminal. An input voltage can be applied between the first input terminal and the second input terminal, a switch branch having a switch, wherein the switch is designed to close a circuit path between the first input terminal and the second input terminal, and a reverse polarity protection diode, which, in the switch branch, is connected in series with the switch.

A two-terminal rectifier includes a power MOSFET, a body diode, and a Schottky diode coupled between the first terminal and the second terminal. The two-terminal rectifier also has a power management circuit, a capacitor, a control circuit, and a driver circuit coupled between the first terminal and the second terminal. The two-terminal rectifier can be implemented in a two-pin package and can be used in a power converter for CCM operation.

A power electronics circuit is disclosed that includes a switching circuit comprising a first solid-state device coupled in series with a second solid-state device, with at least the first solid-state device comprising a solid-state switch having a gate terminal. The power electronics circuit also includes a current sense transformer positioned between the first and second solid-state devices and configured to sense a current flowing on a conductive trace connecting the first and second solid-state devices, and a controller coupled to the switching circuit and the current sense transformer so as to be in operable communication therewith. The controller is programmed to receive a current sense signal from the current sense transformer indicative of the current flowing on the conductive trace and modulate a gate voltage to the gate terminal of the first solid-state device based on the received current sense signal, so as to control switching thereof.