In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

The present invention relates to a DC-DC converter and to a method for controlling a DC-DC converter with high dielectric strength and reduced power losses. An optimized control of a potential-isolating multi-level half-bridge converter according to a phase-shifted full-bridge configuration with a novel modulation method is proposed.

This disclosure relates to an equivalent transistor and a three-level inverter, and pertains to the field of power electronics technologies. The equivalent transistor includes a first transistor, a second transistor, and a diode. A source electrode of the first transistor is electrically connected to a source electrode of the second transistor; a gate electrode of the first transistor is electrically connected to a gate electrode of the second transistor; and one end of the diode is electrically connected to a drain electrode of the first transistor, and the other end of the diode is electrically connected to a drain electrode of the second transistor. According to this disclosure, a reverse recovery time can be reduced, and a switching speed of the equivalent transistor can increase.

A voltage transformer comprising a first input terminal and a second input terminal. An input voltage can be applied between the first input terminal and the second input terminal, a switch branch having a switch, wherein the switch is designed to close a circuit path between the first input terminal and the second input terminal, and a reverse polarity protection diode, which, in the switch branch, is connected in series with the switch.

Provided are: a smoothing capacitor connected in parallel to the DC power source; a bridge circuit including switching elements for converting DC power to AC power, flywheel diodes connected in reversely parallel, and flywheel-and-separation diodes connected in series to the flywheel diodes and serving concurrently as flywheel and separation diodes; an interconnection reactor on an output side, provided on AC output lines connecting the bridge circuit and an AC power source; and a separation circuit for separating the smoothing capacitor and the interconnection reactor from each other during a flywheel period of the flywheel diodes. The separation circuit includes separation switching elements and the flywheel-and-separation diodes. The separation switching elements are respectively connected between the two AC output lines and two series connection points between the flywheel diodes and the flywheel-and-separation diodes, so as to short-circuit the AC output lines.

A synchronous converter that includes a power source, an inductor, an output terminal, and a control circuit. The control circuit may include: an electronic energizing switch that, when activated, delivers energy from the power source to the inductor; an electronic de-energizing switch that, when activated, delivers energy from the inductor to the output terminal, the electronic de-energizing switch including a body diode; and an electronic pull-down switch that, when activated, turns off the electronic de-energizing switch, redirects current flowing though the body diode of the electronic de-energizing switch, and removes charge from the body diode of the electronic de-energizing switch. The electronic energizing switch and the electronic de-energizing switch may never both be activated at the same time.

Provided is a technique for reducing the size and cost of a semiconductor device. A semiconductor device includes an IGBT module having an IGBT, and a MOSFET module having a MOSFET whose operational property is different from that of the IGBT, the MOSFET module being connected to the IGBT module in parallel. The semiconductor device is capable of selectively executing an operation mode in which switching timing in the IGBT module and switching timing in the MOSFET module are non-identical.

A three-level inverter includes a first semiconductor switching element disposed between a direct-current high potential terminal and an alternating-current output terminal, a second semiconductor switching element disposed between a direct-current low potential terminal, which is paired with the direct-current high potential terminal, and the alternating-current output terminal, first and second reflux diodes which are disposed reverse-parallelly with the first and second semiconductor switching elements, respectively, and a semiconductor circuit which controls gate voltages of the first and second semiconductor switching elements by selectively applying thereto a direct-current intermediate voltage which is given to a direct-current intermediate potential terminal. Inductance elements are connected in series to the first and second reflux diodes, respectively.

In an electric power conversion circuit, a gate controller executes a first operation. In the first operation, the gate controller performs control such that a first lower FET, a first upper FET, a second lower FET, and a second upper FET satisfy the following conditions: a condition that a first state in which the first lower FET is turned on, a second state in which both of the lower FETs are turned off, a third state in which the second lower FET is turned on, and a fourth state in which both of the lower FETs are turned off appear repeatedly in the order; and a condition that the first upper FET is turned on at a middle of a period of the second state and is maintained in an on state until a middle of a period of the third state.

The present disclosure discloses an active clamp circuit for a power semiconductor switch and a power converter using the same. The active clamp circuit includes: a discharging circuit, a first terminal of the discharging circuit being electrically connected to a collector of the power semiconductor switch; an unidirectional blocking circuit; a first voltage regulator diode connected in series with the unidirectional blocking circuit to form a series branch, a first terminal of the series branch being electrically connected to the collector of the power semiconductor switch; and a resistance-capacitance RC circuit, a first terminal of the RC circuit, a second terminal of the discharging circuit, and a second terminal of the serial circuit being electrically connected, a second terminal of the RC circuit being electrically coupled to a gate of the power semiconductor switch.