A backflow preventing device includes a backflow preventing element connected between a power source and a load, for preventing a backflow of a current from the load side to the power source side, a commutation device configured to perform a commutation operation of causing a current to flow through an other path connected in parallel to the backflow preventing element, and a controller configured to change a pulse width of a commutation drive signal for controlling the commutation device to perform the commutation operation based on a current flowing through the backflow preventing element, and transmitting the commutation drive signal having the changed pulse width to the commutation device. The controller transmits the pulse to the commutation device only for a necessary time period so that the commutation device performs the commutation operation, to thereby reduce electric power relating to the commutation operation not contributing to the power conversion.

A power conversion device includes a first switch and a second switch connected in series between a positive electrode and a negative electrode of a first power supply. A first node is between the first and second switches. The first node can be connected to a load. A first diode has an anode connected to the first node and a cathode connected to the positive electrode of the first power supply. A third switch is connected between a positive electrode of a second power supply and the positive electrode of the first power supply. A first timer is connected to a gate electrode of the third switch. A first comparator has a first input that is connected to a gate electrode of the first switch, a second input at which a reference voltage can be received, and an output that is connected to the first timer.

A control method is used in a switching mode power supply to improve dynamic load response and switching loss. A PWM signal is provided to control a power switch and has a switching frequency. A cross voltage of a transformer in the switching mode power supply is detected to provide a de-magnetization time. The switching frequency is controlled in response to a sleep signal and a compensation voltage, which is generated based on an output voltage of the switching mode power supply. The sleep signal is provided in response to the de-magnetization time and a current sense signal, a representative of a winding current of the transformer. The switching frequency is not less than a first minimum value if the sleep signal is deasserted, and not less than a second minimum value if the sleep signal is asserted. The second minimum value is less than the first minimum value.

A control method is used in a switching mode power supply to improve dynamic load response and switching loss. A PWM signal is provided to control a power switch and has a switching frequency. A cross voltage of a transformer in the switching mode power supply is detected to provide a de-magnetization time. The switching frequency is controlled in response to a sleep signal and a compensation voltage, which is generated based on an output voltage of the switching mode power supply. The sleep signal is provided in response to the de-magnetization time and a current sense signal, a representative of a winding current of the transformer. The switching frequency is not less than a first minimum value if the sleep signal is deasserted, and not less than a second minimum value if the sleep signal is asserted. The second minimum value is less than the first minimum value.

An inverter circuit provided in a power conversion device includes a full-bridge inverter, and a short circuit part. The short circuit part includes switching elements and clamp elements connected to the switching elements. The clamp elements suppress application of an excessive voltage such as a surge voltage to the switching elements.

A switching mode power converter circuit and a method are presented. The circuit comprises a first transistor switch and a second transistor switch coupled in series between an input voltage level and ground. There is a control circuit for controlling switching operation of the first transistor switch and the second transistor switch. There is a detection circuit for sensing a voltage at an intermediate node arranged between the first transistor switch and the second transistor switch, for deriving an indication of a slope of the sensed voltage, and for generating a switching control signal for the control circuit on the basis of the derived indication of the slope of the sensed voltage. The control circuit sets a first timing for activating the first transistor switch and/or a second timing for activating the second transistor switch on the basis of the switching control signal.

A switching mode power supply generating reduced high frequency noise. The power supply includes a solid state switch, a modulator for driving the solid state switch with a periodic pulse drive signal, an output filter at the output of the solid state switch, where the output filter includes an inductor and a catch diode. A damping element is included for damping current spikes through the catch diode when said solid state switch turns on and thus reduce noise pulses that would otherwise be introduced by the current spikes.

An active diode having an improved transistor turn-off control method is disclosed. The active diode comprises: a comparator for comparing voltages of both ends of a parasitic diode of a transistor; and a gate driver for controlling a gate terminal of the transistor according to the comparison result of the comparator, and estimates a turn-on time of the transistor and uses the same to control the gate terminal of the transistor.

A control system includes an electronic control unit. The electronic control unit is configured to execute three-phase ON control such that two transistors connected in parallel to the first transistor are switched ON when a condition i) is satisfied, The first transistor is one of the transistor of the six transistors and in which the short-circuit fault has occurred. The condition i) is that a recovery loss of a first diode in which a reverse recovery current is generated is estimated to be smaller than a recovery tolerance.

A method and circuit controls a synchronous rectifier. The synchronous rectifier is turned OFF by driving a gate of the synchronous rectifier to one or more first voltages that are non-zero. One or more values of the drain or the source of the synchronous rectifier are monitored. The gate of the synchronous rectifier is driven to a second voltage that is less than the one or more first voltages whenever the one or more values of the drain or the source of the synchronous rectifier pass above or below one or more threshold values.