A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and a control electrode between the semiconductor part and the first electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer and the fifth layer are selectively provided between the first layer and the second electrode. In a method for controlling the semiconductor device, first to third voltages are applied in order to the control electrode while a p-n junction between the first and second layers is biased in a forward direction. The second and third voltages are greater than the first voltage, and the third voltage is less than the second voltage.

Provided is a transistor drive circuit that drives a transistor to be driven and has a configuration including a controller that performs control to cause to temporally vary a circuit parameter contributing to a rise time or a fall time of the transistor to be driven.

A DC-DC converter, where a first terminal of the first-phase charge pump conversion branch and a first terminal of the second-phase charge pump conversion branch are respectively connected to an output terminal of the power input circuit, a second terminal of the first-phase charge pump conversion branch and a second terminal of the second-phase charge pump conversion branch are respectively connected to an input terminal of the power output circuit, the first-phase charge pump conversion branch and the second-phase charge pump conversion branch are respectively connected to the control circuit and are separately controlled by the control circuit, and the control circuit generates control signals of the first-phase charge pump conversion branch and the second-phase charge pump conversion branch based on feedback signals output by the converter. This converter can provide higher voltage conversion efficiency and implement flexible operating mode switching.

A DC/DC converter includes N converters connected in parallel and each having an inductor, a switching element, and a reverse-flow preventing element. Each converter is controlled at phases different from each other and such that a sum of switching frequencies F is out of a first non-selected frequency band. The inductor has an inductance that decreases as the switching frequency F increases. The switching element is controlled using the switching frequency F higher than a second non-selected frequency band of which upper and lower limit frequencies are 1/N of upper and lower limit frequencies of the first non-selected frequency band, and has a total gate charge such that a total loss is smaller than that in a case where the switching frequency F is set to be lower than the second non-selected frequency band.

When the duty command value is less than or equal to a threshold value, the motor control device performs the complementary PWM control, and when the duty command value is greater than the threshold value, it sets, for the first element, a first period in which the first element remains turned on and a second period in which control is performed with a corrected duty cycle to turn off the first element for a longer period, and performs average PWM control of which average duty cycle in a total period of the first and second periods is same as a set duty cycle. The motor control device turns on the second element while the first element is turned off in the second period.

A motor driving apparatus of driving a motor including a plurality of windings respectively corresponding to a plurality of phases is disclosed The motor driving apparatus includes a first inverter including a plurality of first switching elements and connected to a first end of each of the windings, a second inverter including a plurality of second switching elements and connected to a second end of each of the windings, and a controller connected to the first switching elements and the second switching elements and configured to determine an effective vector closest to a voltage vector corresponding to a preset voltage command of the motor as a duty of the plurality of second switching elements and to control pulse width modulation of the first switching elements using a value obtained by adding the effective vector corresponding to the duty of the second switching elements to the voltage command of the motor as a voltage command of the first inverter.

A semiconductor device includes: an insulated circuit substrate; a power semiconductor element mounted on the insulated circuit substrate; a first terminal having a plate-like shape having a first main surface and electrically connected to the power semiconductor element; a second terminal having a second main surface opposed to the first main surface of the first terminal and electrically connected to the power semiconductor element; an insulating sheet interposed between the first main surface and the second main surface; and a conductive film provided on at least one of the first main surface side and the second main surface side of the insulating sheet.

A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Systems and methods for controlling a dual active bridge converter are disclosed herein. Switch control signals are provided to respective switches of at least one bridge of a dual active bridge converter. Control circuitry causes the switch control signals to switch according to a first switching sequence. After causing the switch control signals to switch according to the first switching sequence, the control circuitry causes the switch control signals to switch according to a second switching sequence, distinct from the first switching sequence, to distribute switching losses among the switches.

A drive system includes: first and second inverters; a high-potential-side connection line; a low-potential-side connection line; a first changeover switch provided to at least one of the high-potential-side and low-potential side connection lines; a second changeover switch connected in parallel to the first changeover switch; a mode control section changing between a first mode in which to perform switching driving of upper and lower arm switches in one of the inverters and perform neutral point driving of at least one of the upper and lower arm switches in the other inverter to maintain in an on state and a second mode in which to perform switching driving of the upper and lower arm switches in both the inverters; and a changeover control section that, at the time of a changeover between the first and second modes, changes the first and second changeover switches between the on and off states.