An embodiment switching converter comprises an input stage; an output stage for providing an output voltage; a capacitive coupling stage for coupling the input stage to the output stage; a first switching stage configured to switch between a first state where an input voltage is provided to the input stage, and a second state where the input voltage is not provided to the input stage; a second switching stage configured to switch between a first state in which a reference voltage is provided to the output stage, and a second state in which the reference voltage is not provided to the output stage; and a voltage regulation stage configured to set, after the second switching stage switches from the first state to the second state and before the first switching stage switches from the second state to the first state, a target voltage across the input stage.

A drive circuit includes a second drive circuit that drives a semiconductor switching element in a case where a pulse width of a corresponding signal is determined to be larger than a second threshold, and a timing adjustment circuit that adjusts a timing at which the second drive circuit cooperates with a first drive circuit to drive the semiconductor switching element during a turn-off period of the semiconductor switching element due to drive of the first drive circuit.

An apparatus may include a first switch leg connected between a first input terminal and a first output terminal, the first switch leg comprising serially connected switches. The apparatus may also include a second switch leg connected between a second input terminal and the first output terminal, the second switch leg comprising serially connected switches. The apparatus may further include a third switch leg connected between an input voltage midpoint and the first output terminal. A control circuit may control the first switch leg, the second switch leg and the third switch leg.

Full bridge converter-circuit having a H-bridge, comprising a control circuit for operating the H-bridge in a first operation mode or a second operation mode, wherein the control circuit is configured that between switching from the first operation mode to the second operation mode a morphing operation mode is applied in which a positive inverter voltage pulse length on a first half-bridge of the H-bridge is determined on the basis of a negative inverter voltage pulse length on a second half-bridge of the H-bridge.

A bootstrap gate driver charging circuit arranged to drive the gate of an upper switch (Q.sub.U) and a lower switch (Q.sub.L) connected in series to provide an AC output voltage (400) voltage by alternatively turning on and off according to a predetermined duty cycle of alternate upper switch turn-on and lower switch turn-on phases, the bootstrap gate driver charging circuit comprising: an input terminal; an output terminal; an H-bridge inverter with an inverter input and an inverter output; a charging path; and a bootstrap capacitor. The input inverter is electrically connected to the input terminal, the inverter output is electrically connected to a first end of the bootstrap capacitor, the charging path is electrically connected between a second end of the bootstrap capacitor and a gate driver supply voltage; wherein in response to the lower switch being turned ON and providing a path to ground with respect to the supply voltage.

A gate drive circuit, which drives a gate of a first transistor, includes a first switch on a high potential side and a second switch on a low potential side connected in series at a second connection node between a high potential end and a low potential end of a series connection structure, constituted of a first voltage source and a second voltage source connected in series at a first connection node; and a third switch and an inductor connected in series between the first connection node and the second connection node. The gate of the first transistor can be electrically connected to the second connection node.

A battery charging apparatus includes a first switch, a second switch, a third switch and a fourth switch connected in series between an input voltage bus and ground, wherein a common node of the second switch and the third switch is configured to be coupled to a battery, a flying capacitor connected between a common node of the first switch and the second switch, and a common node of the third switch and the fourth switch, and a controller configured to generate gate drive signals for configuring at least one switch of the first switch and the second switch as a linear regulator during a charging process of the battery.

The present invention provides a Pulse Width Modulation (PWM) method for a Cascaded H-bridge (CHB) converter. Each phase of the converter is provided with n Cascaded H-bridge rectifier circuits, or may also be provided with n Cascaded H-bridge rectifier circuits+1 redundant H-bridge rectifier circuit. The method includes following steps of: S1, generating groups of sinusoidal signals as reference waveforms, and generating n carrier signals having sequentially decreasing levels and equal amplitudes to correspond to the H-bridge rectifier circuit at the first to the n.sup.th levels, where the levels of the n carrier signals are cascaded to fill the voltage amplitude of a unipolar half cycle of the reference waveform; and S2, determining PWM signals for controlling power transistors of the corresponding H-bridge rectifier circuits based on each reference waveform and each carrier signal. According to the present invention, the CHB converter allows the MV grid to be directly coupled with a LV side without a conventional transformer, which reduces the heat loss and balances the distribution of heat loss between the power transistors and between the H-bridges at all levels, thus prolonging the service life.

A control circuit includes a detection module configured to detect an operating condition of a semiconductor switching device; a determining module configured to determine a gate allowable voltage of the semiconductor switching device based on the operating condition; and an output module configured to output a control signal to a driving power supply circuit of the semiconductor switching device based on the gate allowable voltage, to control the driving power supply circuit to provide a gate on voltage that is not higher than the gate allowable voltage and that is positively correlated with the gate allowable voltage for the semiconductor switching device. When the operating condition of the semiconductor switching device becomes better, the gate allowable voltage of the semiconductor switching device is increased.

A power semiconductor system includes: a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board; and an inductor module attached to the power stage module and having an inductor electrically connected to an output node of the power stage module. The inductor includes windings patterned into a second printed circuit board of the inductor module.