The present disclosure relates generally to a switch driving circuit and power factor correction circuit having the same, and more particularly, to a technology to provide a negative offset using Zener diodes to prevent malfunctions in driving a switch. The switch driving circuit to operate a switch implemented with a Field Effect Transistor (FET) includes a first Zener diode connected to a control input end of the switch; a capacitor connected in parallel with the first Zener diode; and second and third Zener diodes for providing a negative offset to fix a voltage applied between the gate and source of the switch to a negative value.

A converter for converting a three-phase AC input into a DC output may include three phase input terminals and two output terminals, a phase selector for connecting the three-phase AC input to an upper intermediate node, a lower intermediate node, and a middle intermediate node. The phase selector includes semiconductor switches for selectively connecting the middle intermediate node to the three phase input terminals, and a controller. The electrical converter includes a boost circuit and a buck-boost circuit. The boost circuit includes an upper boost circuit, a lower boost circuit, and a common node. The buck-boost circuit has an output connected to the two output terminals in parallel with an output of the boost circuit, and includes at least two semiconductor switches that are actively switchable and connected in series across the output terminals. The middle intermediate node is connected to a common node of the two second semiconductor switches.

An exemplary embodiment of the present invention is a wireless power transmission circuit that provides power to a load of variable resistance with an alternating current (AC) power source induced at a secondary coil in a secondary side of the circuit by a primary coil in a primary side of the said circuit. The wireless power transmission circuit includes a switch-controlled capacitor (SCC) and a semi-active rectifier (SAR). The SCC connects to the AC power source. The SCC includes a first capacitor connected in parallel with two electrically controllable switches in series. The SAR connects to output of the SCC for rectifying the output of the SCC, wherein the SAR comprises a bridge circuit that includes two electrically controllable switches. A control angle of the SCC and a conduction angle of the SAR are regulated to provide a load impedance that matches the impedance of the coils.

A totem-pole PFC circuit is provided. The totem-pole PFC circuit includes an inductor, a first bridge arm and a second bridge arm. The first bridge arm includes a first switch and a second switch connected in series. A first middle node connected between the first and second switches is coupled to a first terminal of an AC power source through the inductor. The second bridge arm connected to the first bridge arm in parallel includes a third switch and a fourth switch connected in series. A second middle node connected between the third and fourth switches is coupled to a second terminal of the AC power source. When a polarity of the AC power source is changed, a change time of a voltage on the second middle node is longer than a preset time not less than 20 μs.

A battery charger includes a plurality of rectifier, a plurality of switches respectively for the plurality of rectifier elements, a zero-crossing detector, a switch controller, and a detection reference changer. The plurality of rectifier elements rectify AC voltages of three phases output from a power generator. The plurality of rectifier elements, in an off-state, causes the plurality of rectifier elements to rectify the AC voltages to charge a battery. The plurality of rectifier elements, in an on-state, causes the AC voltages to be short-circuited to a negative side of the battery. The zero-crossing detector detects zero-crossings of the AC voltages. The switch controller outputs, based on the zero crossings, a gate signal for turning on and off the plurality of switches. The detection reference changer changes a reference for the zero-crossing detector to detect the zero crossings.

Disclosed herein is a bridge rectifier and associated control circuitry collectively forming a “regtifier”, capable of both rectifying an input time varying voltage as well as regulating the rectified output voltage produced. To accomplish this, the gate voltages of transistors of the bridge rectifier that are on during a given phase may be modulated via analog control (to increase the on-resistance of those transistors) or via pulse width modulation (to turn off those transistors prior to the end of the phase). Alternatively or additionally, the transistors of the bridge rectifier that would otherwise be off during a given phase may be turned on to help dissipate excess power and thereby regulate the output voltage. A traditional voltage regulator, such as a low-dropout amplifier, is not used in this design.

A method for generating a current set point value for a charging device connected to an electrical network includes measuring at least one electrical voltage, calculating a filtered voltage according to the measured voltage and a value of electrical pulsation of the electrical network, estimating a frequency and the amplitude of the measured voltage according to the at least one measured voltage and the at least one filtered voltage, calculating a consolidated voltage according to the measured voltage and the filtered voltage, and generating a current set point value according to the consolidated voltage and the estimated amplitude.

An auxiliary circuit for outputting a supplying voltage or a detection signal includes a normally-on device and a signal processing circuit. A drain terminal of the normally-on switching device is coupled to a first terminal, a gate terminal of the normally-on switching device is coupled to a second terminal. An input voltage between the first terminal and the second terminal switches between two different levels. The signal processing circuit is configured to output the supplying voltage or the detection signal according to a voltage at a source terminal of the normally-on switching device.

A circuit for use in a switched mode power supply includes a dual-boost power-factor correction converter having an active rectifier stage with first and second rectifier transistors and first and second boost stages each with an inductor and transistor. An active rectifier controller circuit generates control signals for driving the rectifier transistors, respectively, on and off in accordance with an AC input voltage. A PFC controller circuit generates a pulse-width-modulated (PWM) control signal that is based on an output voltage of the boost stages and which is further based on a current sense signal representing the current passing through the active rectifier stage. A logic circuit generates a control signal for the transistor of the first boost stage and a control signal for the transistor of the second boost stage, based on the PWM control signal and at least one of the control signals for the rectifier transistors.

Embodiments of this application provide a power conversion circuit. The power conversion circuit includes at least one first power conversion unit connected in series to a first phase line, at least one second power conversion unit connected in series to a second phase line, at least one third power conversion unit connected in series to a third phase line, a plurality of first start circuits connected in series to the first phase line, and a plurality of second start circuits connected in series to the second phase line. Each first start circuit includes a first relay and a first resistor that are connected in parallel, and first relays in all the first start circuits are sequentially closed after the power conversion circuit is powered on, to start the power conversion circuit. Each second start circuit includes a second relay and a second resistor that are connected in parallel.