A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

A power conversion device includes a power conversion circuit, a memory, a voltage detection circuit, a current detection circuit, and a control circuit. The power conversion circuit controls a switching device based on a switching pulse signal to convert direct current power into alternating current power and output the alternating current power to a power supply target. The memory stores an alternating current phase difference. The voltage detection circuit detects an alternating current voltage effective value. The current detection circuit detects an alternating current effective value. Based on the alternating current phase difference, the alternating current voltage effective value, and the alternating current effective value, the control circuit stops output of the switching pulse signal at a time when an alternating current has a value of 0.

This application provides a power rectification method and apparatus, to supply power to a load by using a power supply capacity gap formed by a communications power that is at an existing network site, thereby achieving a capacity increase. The method includes: obtaining a total input current of each of three phase lines; and when it is determined that a total input current of at least one of the three phase lines is greater than a total input current threshold corresponding to the at least one phase line, adjusting a rectifier connected to the at least one phase line to reduce a total input power of the at least one phase line, so that the total input current of the at least one phase line is less than or equal to the total input current threshold corresponding to the at least one phase line.

The present application discloses a multi-path resonant circuit and a resonant converter. The multi-path resonant circuit includes at least two parallel N-phase resonant circuits, wherein N is an integer greater than or equal to 3. The at least two parallel N-phase resonant circuits include a first N-phase resonant circuit and a second N-phase resonant circuit. A first resonant inductor in any phase resonant circuit of the first N-phase resonant circuit is coupled with a second resonant inductor in any phase resonant circuit of the second N-phase resonant circuit. In this way, current sharing of the multi-path resonant circuit can be realized through a simpler structure.

The present application discloses a multi-path resonant circuit and a resonant converter. The multi-path resonant circuit includes at least two parallel N-phase resonant circuits, wherein N is an integer greater than or equal to 3. The at least two parallel N-phase resonant circuits include a first N-phase resonant circuit and a second N-phase resonant circuit. A first resonant inductor in any phase resonant circuit of the first N-phase resonant circuit is coupled with a second resonant inductor in any phase resonant circuit of the second N-phase resonant circuit. In this way, current sharing of the multi-path resonant circuit can be realized through a simpler structure.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

A control device for a multi-phase converter including converter circuits of m phases of which each includes a switching element includes: a driven phase number control unit configured to control the multi-phase converter in n-phase driving or m-phase driving; a storage unit configured to store first and second patterns; a selection unit configured to select the first or second pattern while the multi-phase converter is stopped, an on/off control unit configured to perform on/off control on the switching elements of the number of driven phases; and a prediction unit configured to predict a predicted correlation value which is correlated with a time ratio which is a ratio of a time in which control in the m-phase driving is predicted to be performed to a time in which control in the n-phase driving is predicted to be performed in a predetermined time.