Power converters with power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a power converter may be configured to receive an alternating current (AC) input signal and output a direct current (DC) output signal. The power converter may include at least one DC/DC converter and a power factor correction circuit. The power factor correction circuit may include a first switching transistor comprising a first gate; a second switching transistor in series with the first switching transistor and comprising a second gate; and a controller configured to generate first and second pulsed signals having respective and complementary phases and separated by an adjustable deadtime and apply the generated first and second pulsed signals to the first and second gates, respectively.

According to the present disclosure, the deterioration of SiC-MOSFETs is suppressed. A drive device switches between a first SiC-MOSFET and a second SiC-MOSFET that are connected in series, with a dead time where the first SiC-MOSFET and the second SiC-MOSFET are commanded to be OFF being provided in between. This drive device includes: a first drive circuit configured to set the gate voltage of the first SiC-MOSFET, during the dead time, to a first middle voltage that is higher than a first negative power supply voltage and lower than a first threshold voltage for the first SiC-MOSFET; and a second drive circuit configured to set the gate voltage of the second SiC-MOSFET, during the dead time, to a second middle voltage that is higher than a second negative power supply voltage and lower than a second threshold voltage for the second SiC-MOSFET.

Power converters with power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a power converter may be configured to receive an alternating current (AC) input signal and output a direct current (DC) output signal. The power converter may include a transformer and a power factor correction circuit. The power factor correction circuit may include: a first switching transistor and a second switching transistor in series with the first switching transistor; and a controller configured to generate first and second pulsed signals having respective and complementary phases and separated by an adjustable deadtime and apply the generated first and second pulsed signals to the first and second transistors, respectively. A primary side of the transformer may be coupled to a node between the first and second switching transistors.

Power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a controller for a power factor correction circuit may include a comparator, a frequency controller, and a deadtime controller. The controller may be configured to: receive an input signal comprising a measured output voltage of the power factor correction circuit; compare, via the comparator, the measured output voltage with a set point, resulting in a difference between the measured output voltage and the set point; feed the difference into the frequency controller and adjust a frequency of the first and second pulsed signals based on an output of the frequency controller; and provide the difference to the deadtime controller and adjust the deadtime of the first and second pulsed signals based on an output of the deadtime controller.

When the duty command value is less than or equal to a threshold value, the motor control device performs the complementary PWM control, and when the duty command value is greater than the threshold value, it sets, for the first element, a first period in which the first element remains turned on and a second period in which control is performed with a corrected duty cycle to turn off the first element for a longer period, and performs average PWM control of which average duty cycle in a total period of the first and second periods is same as a set duty cycle. The motor control device turns on the second element while the first element is turned off in the second period.

An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.

A power conversion device includes a switching signal generation unit that generates switching signals so that time points of at least one of pairs synchronize with each other. A first pair includes a rising time point at a first junction point of a first single-phase leg, and a falling time point at a second junction point of a second single-phase leg. A second pair includes a falling time point at the first junction point and a rising time point at the second junction point. The switching signal generation unit determines time points to turn on or turn off for upper arm switching element and a lower arm switching element based on phase currents respectively at a rising time point and at a falling time point of the terminal voltages.

A voltage measurement device for pulse-width modulation (PWM) signals is provided, which includes a conversion circuit and a processing circuit. The conversion circuit receives a first PWM signal and a second PWM signal from a motor driving device, and converts the first PWM signal and the second PWM signal into the absolute value signal and the polarity signal of the line-to-line voltage signal between the first PWM signal and the second PWM signal. The processing circuit converts the polarity signal and the absolute value signal into a first integral signal and a second integral signal, and reconstructs the line-to-line voltage signal according to the first integral signal and the second integral signal so as to obtain the reconstructed voltage signal of the line-to-line voltage signal.

There is provided a DC power source apparatus that can prevent failures in components included in the DC power source apparatus and a load and that can prevent damage to or deterioration in the components. A control unit of the DC power source apparatus includes a function of limiting a duty value that is the ratio of an on-time to the switching period of a switching device, and makes an upper limit value for limiting the upper limit of the duty value variable during switching operation of the switching device.

A method for actuating a circuit arrangement for power semiconductors of an inverter with at least one phase, having at least two semiconductor switches, each of which has at least two power semiconductors consisting of different semiconductor materials and connected in parallel with one another, wherein the method includes switching over between the at least two power semiconductors of different semiconductor materials within a clock period in each of the phases in each case at a first or last switching time of a switchover between the at least two semiconductor switches.