An oscillating device includes a first quartz crystal resonator, a driving circuit, a first waveform adjustment circuit, and at least two second quartz crystal resonators. The first quartz crystal resonator has a first resonant frequency. The driving circuit, coupled to the first quartz crystal resonator, drives the first quartz crystal resonator to generate a first oscillating signal having the first resonant frequency. The second quartz crystal resonators, coupled in parallel and coupled to the driving circuit and the first quartz crystal resonator, have a second resonant frequency and receive and rectify the first oscillating signal to generate a second oscillating signal having the second resonant frequency. The first waveform adjustment circuit, coupled to the second quartz crystal resonators, receives the second oscillating signal and adjusts the second oscillating signal to generate a first waveform adjustment signal.

Nested phase-locked loops (PLLs) utilize resonators of different quality factors, oscillation frequencies, and tunability. A reference clock signal for a first PLL is based on a free running bulk acoustic wave (BAW) resonator. The first PLL utilizes an LC oscillator as a voltage controlled oscillator. A crystal oscillator supplies a reference clock signal to a second PLL. Feedback dividers of the first and second PLLs are coupled to the LC oscillator. A delta sigma modulator coupled to the loop filter of the second PLL controls the feedback divider of the first PLL. The first PLL utilizes a high update rate to ensure that the jitter power spectral density is spread over a wide frequency range. The nested PLL architecture allows the overall phase noise plot to follow that of the crystal resonator at low frequencies, the BAW resonator at mid-frequencies, and the LC resonator at high frequencies.

A quartz crystal device includes a package and a crystal blank mounted inside the package. An area of a flat surface of a mounted surface of the blank is 10% or more and 30% or less with respect to an area of a flat surface specified by a width and a depth of the package.

An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element overlaps at least one of the external terminals in a plan view, and each of the bump members is bonded to the package at a position where at least a part of the bump member does not overlap the plurality of external terminals in the plan view.

An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element overlaps at least one of the external terminals in a plan view, and each of the bump members is bonded to the package at a position where at least a part of the bump member does not overlap the plurality of external terminals in the plan view.

An oscillating device includes a first quartz crystal resonator, a driving circuit, a first waveform adjustment circuit, and at least two second quartz crystal resonators. The first quartz crystal resonator has a first resonant frequency. The driving circuit, coupled to the first quartz crystal resonator, drives the first quartz crystal resonator to generate a first oscillating signal having the first resonant frequency. The second quartz crystal resonators, coupled in parallel and coupled to the driving circuit and the first quartz crystal resonator, have a second resonant frequency and receive and rectify the first oscillating signal to generate a second oscillating signal having the second resonant frequency. The first waveform adjustment circuit, coupled to the second quartz crystal resonators, receives the second oscillating signal and adjusts the second oscillating signal to generate a first waveform adjustment signal.

Techniques for improving Bulk Acoustic Wave (BAW) reflector and resonator structures are disclosed, including filters, oscillators and systems that may include such devices. A Bulk Acoustic Wave (BAW) resonator of this disclosure may comprise a substrate and an active piezoelectric resonant volume. The active piezoelectric resonant volume of the Bulk Acoustic Wave (BAW) resonator may have a main resonant frequency. The active piezoelectric resonant volume of the Bulk Acoustic Wave (BAW) resonator may comprise first and second piezoelectric layers having respective piezoelectric axis that substantially oppose one another. A first patterned layer may be disposed within the active piezoelectric volume. This may, but need not facilitate suppression of spurious modes. The main resonant frequency of the Bulk Acoustic Wave (BAW) resonator may be in a super high frequency (SHF) band. The main resonant frequency of the Bulk Acoustic Wave (BAW) resonator may be in an extremely high frequency (EHF) band.

An integrated circuit includes a clock control circuit coupled to a reference clock signal node and a plurality of circuits including a voltage regulator, a digital circuit, and an analog circuit. The voltage regulator, in operation, supplies a regulated voltage. The clock control circuit, in operation, generates a system clock. Input/output interface circuitry is coupled to the plurality of circuits and a common input/output node. The input/output interface circuitry, in operation, selectively couples one of the plurality of circuits to the common input/output node.

An integrated circuit includes a clock control circuit coupled to a reference clock signal node and a plurality of circuits including a voltage regulator, a digital circuit, and an analog circuit. The voltage regulator, in operation, supplies a regulated voltage. The clock control circuit, in operation, generates a system clock. Input/output interface circuitry is coupled to the plurality of circuits and a common input/output node. The input/output interface circuitry, in operation, selectively couples one of the plurality of circuits to the common input/output node.

A real-time clock module includes an oscillation circuit, a storage unit that stores adjustment data used to adjust an oscillation frequency of the oscillation circuit, a data abnormality determination circuit that compares first data based on the adjustment data with second data based on the adjustment data to determine whether or not at least one of the first data and the second data is abnormal, and a flag register that holds a data abnormality flag in which a first value indicating that the first data and the second data are normal, or a second value indicating that at least one of the first data and the second data is abnormal is set, based on a signal from the data abnormality determination circuit.