A digital phase-locked loop (DPLL) includes a time-to-digital converter (TDC) having a first clock input, a second clock input, and a TDC output. The DPLL includes a digital loop filter (DLF). The DLF output controls a numerically-controlled bulk acoustic wave oscillator (NCBO). The NCBO output is divided down a fractional-N divider and is fed back to the TDC. The NCBO includes a reference oscillator, a phase and/or frequency detector, a charge pump, a loop filter, a voltage-controlled bulk acoustic wave oscillator (VCBO) and a feedback fractional-N divider that has a numerical control input, which is controlled by DLF output of DPLL. The NCBO forms a stable feedback loop and have a loop bandwidth much wider than DPLL loop bandwidth. In steady state, the NCBO output frequency can be linearly numerically adjusted. An auxiliary PLL or a fractional output divider can be used to generate additional needed frequencies.

A clock oscillator includes with a pullable BAW oscillator to generate an output signal with a target frequency. The BAW oscillator is based on a BAW resonator and voltage-controlled variable load capacitance, responsive to a capacitance control signal to provide a selectable load capacitance. An oscillator driver (such as a differential negative gm transconductance amplifier), is coupled to the BAW oscillator to provide an oscillation drive signal. The BAW oscillator is responsive to the oscillation drive signal to generate the output signal with a frequency based on the selectable load capacitance. The oscillator driver can include a bandpass filter network with a resonance frequency substantially at the target frequency.

An oscillator, including a resonance circuit, a cross coupled current source circuit, and a positive feedback circuit coupled between the current source circuit and the resonance circuit, where the resonance circuit is configured to generate a differential oscillation signal having a first oscillation frequency, the positive feedback circuit is configured to receive the differential oscillation signal, and amplify a gain of the differential oscillation signal to obtain a differential output oscillation signal, and the current source circuit is configured to provide an adjustable bias current for the resonance circuit and the positive feedback circuit. Since, the current source circuit provides the adjustable bias current for the positive feedback circuit and the resonance circuit, and forms a transconductance boosted (Gm-boosted) structure with the positive feedback circuit, the positive feedback circuit can amplify the gain of the received differential oscillation signal to obtain the differential output oscillation signal.

An integrated circuit formed with a process that enables multiple types of gate stacks improves a quality factor of metal oxide semiconductor (MOS) varactors at the device level. In one instance, the integrated circuit includes multiple first type transistors having a first gate stack with a first resistance and multiple second type transistors having a second gate stack with a second resistance that is higher than the first resistance. The integrated circuit also includes a metal oxide semiconductor varactor having the first gate stack with the first resistance.

An integrated circuit includes first and second coils, a first pad connected to the first coil and to a resonator, a second pad connected to the second coil and to the resonator, and first and second output terminals. The first pad is arranged to provide signals between the resonator and the first coil. The second pad is arranged to provide signals between the resonator and the second coil. A distance between the first pad and the first coil is less than a distance between the first coil and the first output terminal and a distance between the first coil and the second output terminal. A distance between the second pad and the second coil is less than a distance between the second coil and the first output terminal and a distance between the second coil and the second output terminal.

A differential Colpitts oscillator circuit is described which provides a larger tuning range, has better phase noise and uses less power than conventional differential Colpitts oscillator circuits. The circuit is characterized by a capacitive ladder in which only variable capacitor is used for tuning the circuit. In some embodiments, a variable capacitor can be used for fine tuning.

An oscillation module includes: an oscillation circuit; a multiplication circuit which is provided at a stage subsequent to the oscillation circuit and is operated by differential motion; and an output circuit which is provided at a stage subsequent to the multiplication circuit.

An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, a control terminal that is electrically coupled to the circuit device, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit and sets a potential of the control terminal to an abnormality detection voltage when an abnormal state is detected by the abnormality detection circuit.

An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

According to one embodiment, there is provided a semiconductor device including a first switch, a first capacitive element, a second capacitive element, a first rectifying circuit, a second rectifying circuit, a third rectifying circuit, and a fourth rectifying circuit. The first switch is electrically inserted between a first node and a second node. The first capacitive element is electrically inserted between a first signal node and the first node. The second capacitive element is electrically inserted between a second signal node and the second node. The first rectifying circuit is electrically connected to the first node with a first polarity. The second rectifying circuit is electrically connected to the first node with a second polarity opposite to the first polarity. The third rectifying circuit is electrically connected to the second node with the first polarity. The fourth rectifying circuit is electrically connected to the second node with the second polarity.