A load pulled oscillator circuit. The load pulled oscillator circuit comprises: i) an active circuit comprising a load pulled oscillator transistor, the active circuit having an optimal operational bias point; ii) an impedance matching circuit coupled to the active circuit; and iii) a temperature compensation circuit coupled to the active circuit and configured to compensate a bias voltage to the active circuit to thereby maintain the optimal operational bias point. The temperature compensation circuit comprises a thermistor that provides a variable resistance according to an ambient temperature in which the active circuit operates. The variable resistance of the thermistor compensates for changes in the ambient temperature to thereby maintain the optimal operational bias point.

An oscillator, including a resonance circuit, a cross coupled current source circuit, and a positive feedback circuit coupled between the current source circuit and the resonance circuit, where the resonance circuit is configured to generate a differential oscillation signal having a first oscillation frequency, the positive feedback circuit is configured to receive the differential oscillation signal, and amplify a gain of the differential oscillation signal to obtain a differential output oscillation signal, and the current source circuit is configured to provide an adjustable bias current for the resonance circuit and the positive feedback circuit. Since, the current source circuit provides the adjustable bias current for the positive feedback circuit and the resonance circuit, and forms a transconductance boosted (Gm-boosted) structure with the positive feedback circuit, the positive feedback circuit can amplify the gain of the received differential oscillation signal to obtain the differential output oscillation signal.

The present disclosure describes aspects of a switchable inductor network for wideband circuits. In some aspects, the switchable inductor network provides selectable inductance. The switchable inductor network includes a first coil and a second coil that includes a first inductive segment and a second inductive segment. Connection points of the second coil connect the second coil across a portion of the first coil. The switchable inductor network also includes a switch connected between the first inductive segment and the second inductive segment of the second coil. The switch is configured to change the selectable inductance of the switchable inductor network by selectively coupling the first inductive segment to the second inductive segment of the second coil in response to a control signal.

A switched capacitor is provided. The switched capacitor includes a pair of parallel component stacks. Each stack is connected to a common top node and a common bottom node. Each stack includes a BJT. Each stack further includes a first resistor in series with the BJT and having a first side connected to a collector of the BJT at an intermediate node in a same one of the stacks and a second side connected to the common top node. Each stack also includes a capacitor having a first side connected to the intermediate node and a second side for providing an impedance. Each stack additionally includes a second resistor having a first side connected to a base of the BJT to prevent base-current surge in the BJT and a second side connected to a switch base control signal that selectively turns the BJT on or off.

A bias-current-control circuit is provided. The bias-current-control circuit includes a transconductance circuit, a constant-current source, and a current-mirror circuit. The transconductance circuit is connected to a node and detects a voltage signal to generate a first current. The constant-current source is connected to the node and generates a tail current. The current-mirror circuit includes a reference current terminal and a bias current terminal, and the reference current terminal is coupled to the node. A second current which flows through the reference current terminal is determined by a current difference between the tail current and the first current. A bias current which flows through the bias current terminal is generated based on the second current. Furthermore, the second current and the bias current are in a predetermined ratio.

In accordance with an embodiment, a voltage controlled oscillator (VCO) includes a VCO core having a plurality of transistors and a varactor circuit that has a first end coupled to emitter terminals of the VCO core and a second end coupled to a tuning terminal. The varactor circuit includes a capacitance that increases with increasing voltage applied to the tuning terminal with respect to the emitter terminals of the VCO core.

Relax oscillation circuits have at least one comparison circuit that is structured with a flipped gate transistor and a normal MOS transistor wherein the two transistors having different threshold voltages. The relaxation oscillators are configured for charging and discharging capacitances between the threshold voltages of the flipped gate transistor and the normal MOS transistor by toggling the state of a latching circuit to control the charging and discharging of the capacitances.

Methods, systems, and devices for wireless communication are described for enhanced broadband operation of an active mixer. In an example, an apparatus may include an active mixer that converts between radio frequency (RF) signals and intermediate frequency (IF) signals based at least in part on an alternating current (AC) local oscillator (LO) signal, wherein a direct current (DC) current generated within the active mixer is dependent in part on a bias voltage and the AC LO signal. The apparatus may include a mixer biasing circuit that generates the bias voltage for the active mixer, a magnitude of the bias voltage having an inverse relationship to an amplitude of the AC LO signal.

A Pierce oscillator is provided with a transconductance amplifier transistor having a DC drain voltage that is regulated to equal a reference voltage independently from a DC gate voltage for the transconductance amplifier transistor.

An oscillator circuit includes an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor, a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable, and a second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable. The first bias current and the second bias current are used to tune a frequency range of the oscillator.