A semiconductor integrated circuit has a first output node and a second output node that complementarily outputs an oscillation signal, a capacitance circuit, an inductor, a first inverter and a second inverter connected in parallel and in opposite directions, a bias circuit that supplies a bias voltage to the capacitance circuit, and a control circuit that controls the bias circuit and supplies a reference voltage for controlling an oscillation frequency of the oscillation signal to the capacitance circuit. The capacitance circuit includes a first variable capacitance element and a second variable capacitance element connected in series, and the control circuit controls the bias voltage based on a change in an oscillation frequency of the oscillation signal when a voltage level of the reference voltage supplied to a connection node of the first variable capacitance element and the second variable capacitance element is changed in a plurality of ways.

A biasing scheme for a frequency multiplication circuit, and transceiver using LO signals provided by the frequency multiplication circuit are described. A frequency doubler is cascaded with a mixer to provide a mm-wave oscillator signal. The combination provides a frequency triple that of the LO frequency supplied to the frequency doubler from a PLL. A small-sized replica of the frequency doubler is used to determine biasing of transconductance devices of the frequency doubler. A voltage output of the replica is amplified and the difference between the output and a reference voltage is supplied as feedback to the control terminal of the transconductance devices to bias the transconductance devices to near threshold. The biasing is replicated at the frequency doubler to compensate for PVT variations. A PTAT current source tied to the output of the replica regulates an average output current of the frequency multiplication circuit.

Oscillator circuits, electronic devices, and methods are disclosed. In one embodiment, an oscillator circuit includes a plurality of oscillator transistors comprising a plurality of gates, a plurality of adjustment transistors coupled to the plurality of gates, a differential output coupled to the plurality of oscillator transistors, a plurality of current transistors configured to receive one or more mixed bias current outputs, and generate a main current based on the one or more mixed bias current outputs, the one or more mixed bias current outputs and the main current being substantially constant over a range of temperatures, and one or more switches configured to set an oscillation frequency of the differential output by driving a first portion of a main current through at least one of the plurality of oscillator transistors, and driving a second portion of the main current through at least one of the plurality of adjustment transistors.

A low energy transmitter is provided. The transmitter includes an antenna circuit wherein the antenna circuit has an antenna positive node interface (Vop) and an antenna negative node interface (Von); a reference voltage source that supplies a reference voltage to the antenna circuit; and a common mode feedback (CMFB) circuit coupled to the antenna circuit that receives from the antenna circuit inputs from the Vop and the Von and supplies at least one signal to the antenna circuit.

A voltage controlled oscillator (VCO) circuit employing digital amplitude control of the output oscillating signal and method of operation. The digital control is provided by an analog to digital converter (ADC) element that is shared among many other operating blocks in a system. In a configuration, the oscillator current is obtained by implementing transistors in a linear region and controlling them digitally. The optimum amplitude detection is performed by measuring the DC voltage at the common mode nodes in the oscillator, and is realized using reduced time compared to an extensive frequency measurement over a long time window. The digital control is implemented using an on-chip regulator, and employs digital controls for adjusting the current consumption which leads to low on-chip area overhead, low cost, and a scalable implementation. In an implementation, a one-time code can be obtained for optimum phase noise operation when providing the digital amplitude control.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

An oscillator operable in Class-C comprises at least one set of cross-coupled transistors. A threshold voltage of the transistors is controllable by having a bias voltage applied at back-gates of the transistors. The bias voltage thereby controls a conduction angle of the transistors to enable operation of the oscillator in Class-C. There is further provided a radio transceiver comprising such an oscillator, a method of operating such an oscillator, and a controller configured to operate such an oscillator.

An integrated circuit device includes a first pad and a second pad electrically coupled to one end and the other end of a resonator, an oscillation circuit that is electrically coupled to the first pad and the second pad and generates an oscillation signal by causing the resonator to oscillate, and an output circuit that outputs a clock signal based on the oscillation signal. The oscillation circuit is disposed along a first side of the integrated circuit device among the first side, a second side that intersects the first side, a third side that is an opposite side of the first side, and a fourth side that is an opposite side of the second side. The first pad and the second pad are disposed in the oscillation circuit along the first side in a plan view, and the output circuit is disposed along the second side.

A voltage controlled oscillator (VCO) circuit employing digital amplitude control of the output oscillating signal and method of operation. The digital control is provided by an analog to digital converter (ADC) element that is shared among many other operating blocks in a system. In a configuration, the oscillator current is obtained by implementing transistors in a linear region and controlling them digitally. The optimum amplitude detection is performed by measuring the DC voltage at the common mode nodes in the oscillator, and is realized using reduced time compared to an extensive frequency measurement over a long time window. The digital control is implemented using an on-chip regulator, and employs digital controls for adjusting the current consumption which leads to low on-chip area overhead, low cost, and a scalable implementation. In an implementation, a one-time code can be obtained for optimum phase noise operation when providing the digital amplitude control.

A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.