A self-biased amplifier includes a capacitor, a bias generation circuit and a common source amplifier. The capacitor is used to receive an input voltage and output an alternating component of the input voltage. The bias generation circuit is coupled to the capacitor, and used to generate a first bias voltage according to the alternating component. The common source amplifier is coupled to the bias generation circuit, and used to generate an amplified voltage according to the first bias voltage.

Apparatuses and methods for quadrature signal generation are provided. An example includes a quadrature signal generator. The quadrature signal generator is configured to generate, based on a received differential signal, a plurality of quadrature clock signals at a same frequency as that of the received differential signal. The quadrature signal generator is also configured to provide the plurality of quadrature clock signals to a memory system.

A circuit device includes a drive circuit driving a resonator, an oscillation circuit having the resonator and a variable capacitance circuit coupled to an oscillation loop including the drive circuit, and a D/A converter circuit that performs D/A conversion on frequency control data and outputs a first voltage signal and a second voltage signal which are differential signals. The variable capacitance circuit includes a first variable capacitance capacitor, to one end of which the first voltage signal is input and, to the other end of which a first bias voltage is input and a second variable capacitance capacitor, to one end of which the second voltage signal is input and, to the other end of which a second bias voltage is input.

An oscillator start-up circuit and methodology for oscillator start-up is disclosed. The circuit includes a reference bias switch coupled to a reference node and a load node of a transconductor of an oscillator. The reference bias switch is responsive to a control signal for start-up of the oscillator and operable to close at a first time prior to start-up of the oscillator to maintain a voltage at the reference node equal to a voltage at the load node prior to application of bias to the transconductor. The reference bias switch is further operable to open at a second time subsequent to the first time. In one embodiment, a separate reference bias voltage is applied to a reference node of the transconductor.

An output buffer for an oscillator circuit and associated methodology. The output buffer has inverters and at least one negative feedback loop coupled to corresponding inverters. The negative feedback loop of the circuit is disabled in response to a control signal until one or more of a defined level of oscillation and a defined period of time is reached during start-up of the oscillator circuit, and is thereafter enabled. At least one of the inverters has at least one second negative feedback loop coupled to the corresponding inverter. An amount of feedback provided by the second negative feedback loop is adjustable in response to a control signal, where a first feedback level is present until a defined level of oscillation and/or a defined period of time is reached during start-up, a second feedback level is thereafter present in, and the first feedback level is less than the second feedback level.

A drive level auto-tuning system includes a driver circuit, a resonant circuit, a driver controller and an automatic tuner. The resonant circuit is electrically connected to the driver circuit. The driver controller is electrically connected to the driver circuit. The automatic tuner is electrically connected to the driver controller, and the automatic tuner is configured to acquire a root-mean-square (RMS) current measured from the resonant circuit, so as to command the driver controller to automatically adjust a gain of driver circuit.

An oscillator bias stabilization circuit and method for biasing the circuit is disclosed. The bias stabilization circuit includes a plurality of resistive dividers responsive to a control signal in the circuit. The plurality of resistive dividers are selectably connectable in the circuit to provide an adaptable equivalent resistance in response to a control signal while keeping a bias voltage produced by the circuit substantially constant as the loop gain of an oscillator is varied. The plurality of resistive dividers are coupled to a node in the oscillator that establishes the bias voltage.

A biasing circuit for biasing a switching transistor, wherein the switching transistor is used for switching a respective capacitor cell into/out of a capacitor array, wherein the capacitor array comprises one or more such capacitor cells, and wherein the capacitor array is coupled in parallel with a primary inductor to form an inductive/capacitive tank. The biasing circuit comprises a secondary inductor which is inductively coupled to the primary inductor, the secondary inductor configured to provide a bias signal for biasing the switching transistor.

An oscillation circuit that causes a vibrator to oscillate includes a bipolar transistor for oscillation, a P-type transistor having a gate to which a collector voltage of the bipolar transistor is input and a source to which a base of the bipolar transistor is connected, a first current source that supplies a current to the bipolar transistor, and a second current source that supplies a current to the P-type transistor.

A crystal oscillator control circuit includes a first terminal and a second terminal, a current source, and a peak detection and bias voltage adjustment circuit. The first terminal and the second terminal are arranged to couple the crystal oscillator control circuit to a crystal. The current source is coupled to a power supply voltage and generates a bias current. The peak detection and bias voltage adjustment circuit is coupled between the bias current and a ground voltage and coupled to the first terminal, and performs peak detection and bias voltage adjustment to correspondingly generate a first signal at a node. The low-pass filter low-pass filters the first signal to generate a filtered signal. The feedback control circuit is arranged to perform feedback control according to the filtered signal to generate an oscillation signal at one or both of the first terminal and the second terminal.