A wide tuning range oscillator system uses multiple active cores with cross-coupled transistors and multiple tapped inductors having windings that can be connected to circuit nodes. These active cores are connected to a pair of symmetric tapping points and are switched ON/OFF by biasing elements. Biasing schemes and the topology of the individual cross-coupled cores may be different from each other. The tapping points are symmetrically arranged around the center point of the inductor. One or more of the active cores may be enabled for tuning the center frequency of the oscillator system.

A detector includes a frequency multiplier and a transceiving node. The frequency multiplier includes a first terminal, a second terminal and an output terminal. The first terminal is used to receive a first injection signal having a first frequency. The output terminal is used to output an output signal. The second terminal is used to receive a second injection signal having a second frequency. The frequency multiplier is used to output the output signal at a frequency substantially equal to a multiple of the first frequency by injection locking and pull the output signal to the second frequency by injection pulling. The transceiving node is coupled to the output terminal and the second terminal of the frequency multiplier. The transceiving node is used to transmit the output signal, and receive a received signal having a third frequency. The received signal is used to update the second injection signal.

Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (g.sub.m) compared to conventional VCOs. This g.sub.m degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.

An oscillator for generating oscillation signals at two output terminals includes an inductor coupled between the two output terminals, a capacitor coupled between the two output terminals, two P-type transistors and two N-type transistors. Source electrodes of the two P-type transistors are coupled to a supply voltage, and gate electrodes of the two P-type transistors are coupled to the two output terminals, respectively. Source electrodes of the two N-type transistors are coupled to a supply voltage, gate electrodes of the two N-type transistors are coupled to the two output terminals, respectively, and drain electrodes of the two N-type transistors are coupled to drain electrodes of the two P-type transistors, respectively. In addition, the drain electrodes of the two N-type transistors are coupled to two internal nodes of the inductor.

A low voltage crystal oscillator (XTAL) driver with feedback controlled duty cycling for ultra low power biases an amplifier for an XTAL in the sub-threshold operating regime. A feedback control scheme can be used to bias the amplifier for an XTAL biased in the sub-threshold operating regime. The amplifier of a XTAL oscillator can be duty cycled to save power, e.g., the XTAL driver can be turned off to save power when the amplitude of the XTAL oscillation reaches a maximum value in range; but be turned back on when the amplitude of the XTAL oscillation starts to decay, to maintain the oscillation before it stops. In addition or alternatively, a feedback control scheme to duty cycle the amplifier of a XTAL oscillator can be used to monitor the amplitude of the oscillation.

The present disclosure describes a low-power, low-phase-noise (LPLPN) oscillator. The LPLPN oscillator includes a resonator load, an amplifier stage, and a loop gain control circuit. The resonator load is structured to resonate at a primary resonant frequency. The amplifier stage is coupled with the resonator load to develop a loop gain that peaks at the primary resonant frequency. The loop gain control circuit is coupled with the amplifier stage, and it is structured to regulate the loop gain for facilitating the amplifier stage to generate an oscillation signal at the primary resonant frequency and suppress a noise signal at a parasitic parallel resonant frequency (PPRF).

A DC-DC converter comprises an oscillator and a charge pump, to ensure operation at low voltage. The oscillator comprises one or more source degenerated transistors comprising a degeneration impedance located between a source of the transistor and a ground connection. The degeneration impedance comprises an inductor and a capacitor. Also provided is an energy harvesting device comprising such a DC-DC converter.

A detector includes an oscillation source, a frequency multiplier, a transceiver and a demodulator. The oscillation source generates a first injection signal with a first frequency. The frequency multiplier receives the first injection signal, outputs an output signal and receives a second injection signal with a second frequency. The frequency multiplier uses injection locking to lock a frequency of the output signal at a multiple of the first frequency, and uses injection pulling to pull the frequency of the output signal to the second frequency. The transceiver transmits the output signal and receives a received signal with a third frequency for updating the second injection signal. The demodulator performs a demodulation operation according to the output signal so as to generate a displacement signal.

An integrated circuit comprising, a resonator, a first clock circuit for generating a first clock signal having a first frequency in response to the resonator, a second clock circuit for generating a second clock signal having a second frequency in response to the resonator, wherein the second frequency of the second clock signal is determined by the programmable frequency divider and a clock mode control circuit coupled to the first clock circuit and the second clock circuit, the clock mode control circuit for gradually switching the resonator between the first oscillator circuit and the second oscillator circuit of the integrated circuit, using a shift register based state machine and utilizing the inertia of the resonator to smoothly transition between the two oscillators, to provide a dual mode clock output signal.

A dynamic rotary traveling wave oscillator circuit includes plurality of multi-output spot-advancing blocks (MOSABs) forming a main-loop and a plurality of multi-input spot-advancing blocks (MISABs) forming a sub-loop. Depending on a desired division ratio, a connection connects blocks on the MOSABs and MISABs to create the desired division ratio.