A device includes an oscillator including at least one inductor and at least one capacitor and configured to generate, based on a positive supply voltage, an output signal oscillating in a resonance frequency of the at least one inductor and the at least one capacitor. The device further includes an oscillation detector configured to determine whether the output signal oscillates based on a clock signal and increase a loop gain of the oscillator until the output signal oscillates.

Relax oscillation circuits have at least one comparison circuit that is structured with a flipped gate transistor and a normal MOS transistor wherein the two transistors having different threshold voltages. The relaxation oscillators are configured for charging and discharging capacitances between the threshold voltages of the flipped gate transistor and the normal MOS transistor by toggling the state of a latching circuit to control the charging and discharging of the capacitances.

Low voltage crystal oscillator having native NMOS transistors used for coupling/decoupling to/from GPIO. The native NMOS transistors function properly at a low supply voltage when on (low resistance) and a high supply voltage when off (high resistance). Oscillator Gm driver bias resistors are repurposed to degenerate the native NMOS transistors when they are off, thereby reducing the leakage current thereof (oscillator circuit decoupled from GPIO nodes). This ensures compliance with the CMOS IIH leakage current specification during an external clock (EC) mode at a high supply voltage.

A Pierce oscillator is provided with a transconductance amplifier transistor having a DC drain voltage that is regulated to equal a reference voltage independently from a DC gate voltage for the transconductance amplifier transistor.

An oscillator module used with a plurality of power sources includes an oscillator unit, a clock monitor unit (CMU), a software module and a digital calibration circuit. The oscillator unit generates a clock signal. The CMU is coupled to the oscillator unit, determines whether an amplitude of the clock signal exceeds a predetermined threshold, and outputs an alarm signal if the amplitude of the clock signal is lower than the predetermined threshold. The software module is coupled to the CMU, and receives the alarm signal to output a calibration signal. The digital calibration circuit is coupled to the oscillator and the software module, and outputs a control signal in response to the clock signal and the calibration signal, adjusting the plurality of power sources to modify the clock signal.

An oscillation circuit includes an oscillator, first and second capacitors connected between two terminals of the oscillator, and an amplification circuit having an input terminal connected to a connecting point between the oscillator and the first capacitor and an output terminal connected to a connecting point between the first capacitor and the second capacitor. The amplification circuit includes a first n-type transistor and a first p-type transistor respectively having source terminals, the connecting point of which is connected to the output terminal of the amplification circuit, a second p-type transistor connected to a gate terminal of the first n-type transistor, and a second n-type transistor connected to a gate terminal of the first p-type transistor.

A crystal oscillator circuit comprises: a crystal oscillator; and an injection frequency generating circuit, the injection frequency generating circuit being configured to sense a signal of the crystal oscillator and amplify the sensed signal, the injection frequency generating circuit being further configured to inject the amplified signal to the crystal oscillator; wherein the crystal oscillator circuit is configured such that the crystal oscillator receives the amplified signal during an initial start-up period of the crystal oscillator and stops receiving the amplified signal at an end of the initial start-up period.

Provided is an oscillation circuit including a first terminal to which a first end of a crystal resonator is to be connected, a second terminal to which a second end of the crystal resonator is to be connected, a first resistor connected between the first terminal and the second terminal, a first transistor that is an N-channel transistor whose source is grounded, whose gate is connected to the first terminal, and whose drain is connected to the second terminal, a second transistor that is a P-channel transistor whose drain is connected to the drain of the first transistor, a third transistor that is a P-channel transistor biased by a constant current. A first state in which the first transistor and the second transistor operate as an inverter circuit, and a second state in which the second transistor and the third transistor operate as a current mirror circuit are switchable.

The present invention concerns an electronic oscillator comprising: an LC resonant circuit comprising an inductive component and a capacitive component, the LC resonant circuit being connected to a first reference voltage node and to an oscillator output node; a first transistor connected to the oscillator output node and arranged to periodically operate in a conducting state and a non-conducting state; and a phase shift circuit. A phase shift circuit output is connected to the first transistor, while a phase shift circuit input is connected by a first feedback circuit to the oscillator output node. The phase shift circuit comprises a signal phase shifter for shifting the phase of a first feedback signal from the first feedback circuit by substantially 180 degrees. The phase shift circuit further comprises a signal adder for adding a first signal from the signal phase shifter and a second signal to obtain a summed signal; and a second transistor connected to the signal adder for mirroring the summed signal to the oscillator output node through the first transistor.

A low-power crystal oscillator circuit operating in Class B, with positive feedback and a step-down voltage regulator.