An oscillation circuit has a charge-discharge type oscillation unit that performs an oscillation operation at an oscillating frequency that is in accordance with a control current value, and a control current generation unit that generates the control current. The control current generation unit includes a reference voltage generation circuit that generates a reference voltage that has a first temperature characteristic, a temperature characteristic slope correction circuit that corrects a slope of a temperature characteristic of a reference voltage in accordance with first correction information and generates an output voltage that has a second temperature characteristic, and a voltage-current conversion circuit that converts the output voltage of the temperature characteristic slope correction circuit into the control voltage, and that corrects the control current value in accordance with second correction information.

A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump. The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.

A circuit device includes a waveform-shaping circuit that waveform-shapes an oscillation signal and provides an output clock signal based on a clock signal. A bias voltage output circuit of the circuit device provides a bias voltage of the oscillation signal that is input to the waveform-shaping circuit. A comparator of the circuit device compares a DC voltage obtained by smoothing the clock signal with a reference voltage. A logic circuit of the circuit device sets an adjustment value of the bias voltage. In a test mode of the logic circuit, the logic circuit changes the adjustment value to determine a set value of the adjustment value based on output of the comparator when the adjustment value is changed and stores the determined set value in a storage circuit.

A circuit for detecting, controlling, and maintaining optimal output swing for a noise performance at a given power with an improved operating range is provided. The circuit includes a Voltage Controlled Oscillator (VCO) (102), a peak detection circuit (104) and an Analog Bias Controller (108). The VCO includes a bias control that is connected to the output swing of the VCO. The peak detection circuit is added at an output of the VCO. The peak detection circuit detects an output swing of the VCO and controls the output swing by controlling bias of the VCO using a feedback loop. An output voltage of the peak detection circuit is proportional to the output swing of the VCO. The Analog Bias Controller compares the output voltage of the peak detection circuit to a reference (VDD) to maintain the output swing of the VCO at a constant level that corresponds to an internally generated reference.

An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.

An oscillator circuit topology using a one-pin external resonator suitable for integrated-circuit low-voltage, low-power applications that require a fast-starting accurate clock is disclosed. The circuit incorporates a novel arrangement of a plurality of active transconductance cells that respond to a digital control and provide adjustable loop gain for the oscillator. A programmable number of start-up transconductance cells are engaged in the initial phase of the oscillation for temporarily increasing the loop gain and energizing the resonator, and are disengaged from the oscillator core once the oscillation level is sufficiently large. The start-up transconductance cells may be identical to the always-on transconductance cells in the oscillator core, or they may be scaled versions of those cells. In addition, a programmable number of identical or scaled transconductance cells may be provided in the oscillator core itself, for accommodating different resonators. Internal circuit implementations of the transconductance cells that enable their efficient combination for increasing the oscillator loop gain are also disclosed.

An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.

Provided is a method for controlling the bias current, I.sub.PIERCE, of an oscillator. The method includes acquiring or determining a digital representation encoding a bias current. The method also includes carrying out an algorithm to update the digital representation if the oscillation amplitude is measured, by one or more peak detectors, to be outside of upper and lower thresholds. Also provided is an apparatus arranged to control the bias current of an oscillator using this method, the apparatus including one or more peak detectors and a current digital to analogue converter.

The present disclosure provides a voltage controlled oscillator for flipped and complementary low noise. The voltage controlled oscillator includes a first resonant cavity, a second resonant cavity, and an associated circuit. The associated circuit is configured to connect the first resonant cavity and the second resonant cavity in series and couple the first resonant cavity and the second resonant cavity. A resonant frequency of the first resonant cavity and a resonant frequency of the second resonant cavity satisfy a first preset condition.

Provided is a circuit device including: an oscillation circuit configured to generate an oscillation signal; a waveform shaping circuit configured to shape the oscillation signal into a clock signal having a rectangular wave; a low-pass filter configured to smooth the clock signal and generate a detection voltage corresponding to a duty of the clock signal; and a differential amplifier configured to output a bias voltage based on a difference between the detection voltage and a reference voltage to an input node of the waveform shaping circuit, in which a unity gain frequency of the differential amplifier is lower than a cutoff frequency of the low-pass filter.