An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

A detector circuit being part of a Radio Frequency Identification (RFID) device is provided, including: a bias current generator circuit configured to generate an output bias current that is proportional to the square of a temperature-dependent input current; first and second Field-Effect Transistor (FET) devices; at least one of the first and the second FET devices is biased by means of the output bias current of the bias current generator circuit so that FET device(s) operates in a sub-threshold region; an incoming Radio Frequency (RF) signal being coupled into at least one of the first and the second FET devices; a current source configured to generate a variable threshold current; and a comparator configured to determine, based on the variable threshold current and the incoming RF signal, whether a value of the incoming RF signal exceeds a threshold value.

A receiver signal path includes a high pass filter that centers a received differential pair of signals around a common mode voltage to generate a centered received differential pair of signals. The receiver signal path includes a demodulator that removes a carrier signal from the centered received differential pair of signals to generate a demodulated signal and generates a logic signal based on the demodulated signal and a predetermined threshold signal. The demodulator includes a differential stage including an extremum selector circuit that generates the demodulated signal based on the centered received differential pair of signals. The demodulated signal corresponds to a mean level of the rectified version of the centered received differential pair of signals. The differential stage includes a second circuit that provides the reference signal based on the predetermined threshold signal. The logic signal is based on a comparison of the demodulated signal to the reference signal.

The device limits the leakage current in an electronic system for recording electrophysiological signals, where the transducer element is an active device, the device comprising an active transducer (1), intended to contact a human tissue, connected to a transimpedance amplifier (2), and a first resistor (6) connected parallel to the transimpedance amplifier (2), an alternate voltage source (7) and a direct voltage source (8), both connected to the active transducer (1), a first capacitor (3) connected between the alternate voltage source (7) and the active transducer (1), a second resistor (4) connected between the direct voltage source (8) and the active transducer (1), parallel with the first capacitor (3) and the alternate voltage source (7), and a second capacitor (5), connected between the active transducer (1) and the transimpedance amplifier (2).

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.