The present invention discloses a mixer bias circuit including a first reference voltage generation circuit, an amplifier, a first transistor array, a first switch array, a second reference voltage generation circuit, a second transistor array, a second switch array, a first resistive component, and a second resistive component. The mixer bias circuit provides multiple bias voltages by dynamically tracking the common mode voltage of a trans-impedance amplifier (TIA) and compensates for imbalance and mismatch effects by asymmetrically trimming the bias voltages to improve the second-order intercept point of a radio frequency (RF) receiver front-end (RXFE).

The disclosed embodiments relate to the design of a system that implements an up-conversion mixer. This system includes a regulator-based linearized transconductance (g.sub.m) stage, which converts a differential intermediate frequency (IF) voltage signal into a corresponding pair of IF currents. It also includes a pair of current mirrors, which duplicates the pair of IF currents into sources of a set of switching transistors. The set of switching transistors uses a differential local oscillator (LO) signal to gate the duplicated pair of IF currents to produce a differential radio frequency (RF) output signal. Finally, a combination of capacitors and/or inductors is coupled to common source nodes of the set of switching transistors to suppress higher order harmonics in an associated common source node voltage signal.

The present invention discloses a mixer bias circuit including a first reference voltage generation circuit, an amplifier, a first transistor array, a first switch array, a second reference voltage generation circuit, a second transistor array, a second switch array, a first resistive component, and a second resistive component. The mixer bias circuit provides multiple bias voltages by dynamically tracking the common mode voltage of a trans-impedance amplifier (TIA) and compensates for imbalance and mismatch effects by asymmetrically trimming the bias voltages to improve the second-order intercept point of a radio frequency (RF) receiver front-end (RXFE).

An apparatus and method are provided for setting a local oscillator duty ratio based on an image distortion level. A first signal is transmitted utilizing a first X-phase path of a transmitter. Further, an image distortion level is measured in connection with the first signal. Based on the measurement, a duty ratio of a local oscillator is set, for reducing a distortion in connection with a transmission of a second signal utilizing a second Y-phase path of the transmitter.

The present disclosure provides an apparatus that includes a first mixer circuit configured to convert between an RF signal and an IF signal based at least in part on an local oscillator (LO) signal. The first mixer circuit is electrically coupled to a first node that is configured to receive the LO signal and a first bias voltage, a second node that is configured to receive the RF signal or the IF signal, and a third node that is configured to provide the IF signal or the RF signal. The apparatus further includes a second mixer circuit electrically coupled to a fourth node configured to receive the LO signal and a second bias voltage, the second node, and the third node. The second bias voltage has a voltage level that is offset from the first bias voltage.

A triple-balanced radio frequency (RF) mixer including a plurality of double-balanced mixer cells and a plurality of transformers is disclosed. Each of the plurality of transformers includes a primary and a secondary. Each primary is connected in series. Each secondary is connected across one double-balanced mixer cell of said plurality of double-balanced mixer cells. The triple-balanced RF mixer further includes a local oscillator (LO) port coupled to each of the plurality of double-balanced mixer cells in parallel, an output port coupled to each of the plurality of double-balanced mixer cells in parallel, and at least one non-ideality source providing at least one-non-ideality. The at least one non-ideality is cancelled at the output port.

A novel and useful apparatus and method for an image-interferer aware single quadrature RF downconversion (SQRD) low intermediate frequency (LIF) receiver and related power reduction techniques utilized therein. The invention applies zero-margin adaptive transceiver (ZMAT) design principles to considerably reduce the receiver's power consumption in an adaptive fashion in accordance with the instantaneous reception conditions. In a low IF dual-branch (i.e. quadrature) downconversion receiver, the radio monitors the image strength and shuts off the receiver's Q branch (or I branch) when image rejection is not needed (i.e. when the relative image strength is below a threshold), thus significantly reducing power consumption in the RF receiver. A zero IF receiver is switched to a SQRD low IF receiver of lower power consumption when the image interferer strength is low enough to allow for a given required level of performance.

A unit cell for a resistive mixer includes a plurality of active devices arranged in series, wherein each of said plurality of active devices having a different output conductance. A resistive mixer includes a plurality of active devices connected in series with one another to form a unit cell.

The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency. A passive mixer for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency comprises a cancellation component for generating a first cancellation signal for cancelling second order intermodulation components by superimposing the first signal weighted by a cancellation value on the third signal; and a mixing component having a first terminal for receiving the first signal, a second terminal for outputting the second signal, and a third terminal for receiving the first cancellation signal, wherein the mixing component is adapted to provide the second signal as output at the second terminal by mixing the first signal provided as input at the first terminal and the first cancellation signal provided as input at the third terminal.

The disclosed embodiments relate to the design of a system that implements an up-conversion mixer. This system includes a regulator-based linearized transconductance (g.sub.m) stage, which converts a differential intermediate frequency (IF) voltage signal into a corresponding pair of IF currents. It also includes a pair of current mirrors, which duplicates the pair of IF currents into sources of a set of switching transistors. The set of switching transistors uses a differential local oscillator (LO) signal to gate the duplicated pair of IF currents to produce a differential radio frequency (RF) output signal. Finally, a combination of capacitors and/or inductors is coupled to common source nodes of the set of switching transistors to suppress higher order harmonics in an associated common source node voltage signal.