Provided is a generator that includes a housing, a high-power circuit including a power amplifier, and a low-power circuit. An air flow guidance plate divides the housing into at least two compartments including a high-power compartment and a low-power compartment. The high-power circuit is disposed within the high-power compartment and the low-power circuit is disposed within the low-power compartment.

An apparatus is disclosed for gain stabilization. In an example aspect, the apparatus includes an amplifier and a gain-stabilization circuit. The amplifier has a gain that is based on a bias voltage and an amplification control signal. The gain- stabilization circuit is coupled to the amplifier and includes a replica amplifier. The replica amplifier has a replica gain that is based on the bias voltage and the amplification control signal. The gain-stabilization circuit is configured to adjust at least one of the bias voltage or the amplification control signal based on a gain error associated with the replica amplifier.

The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.

Provided is an amplifier that includes a first transistor including a gate terminal to which an applied input signal is input, where a current depending on the applied input signal flows through the first transistor. A gate terminal of a second transistor is connected to a load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.

A power amplifier device includes: a first power supply terminal for inputting a first power supply voltage; a first transistor for power amplification that (i) includes a first gate to which a bias voltage is applied, and (ii) is supplied with power from the first power supply terminal; a second power supply terminal for inputting a second power supply voltage lower than the first power supply voltage; a second transistor for monitoring that (i) includes a second gate to which the bias voltage is applied, (ii) is supplied with power from the first power supply terminal or the second power supply terminal, and (iii) imitates an operation of the first transistor; and a bias circuit that is supplied with power from the second power supply terminal and generates and adjusts the bias voltage according to a drain current or a source current of the second transistor.

A signal to be amplified is applied to a gate terminal of an amplifier element that amplifies the signal and that is a transistor, the bias circuit includes: a switching element having a first terminal and a second terminal, the first terminal being electrically connected to the gate terminal; and a trap compensation element having a third terminal and a fourth terminal, the third terminal being connected to the second terminal. Further, the bias circuit includes a control circuit to apply a bias voltage to the gate terminal. Further, the bias circuit includes a voltage application circuit to apply a first voltage to the fourth terminal when the signal to be amplified is a transmission signal, and apply a second voltage to the fourth terminal when the signal to be amplified is a reception signal, the second voltage being a negative voltage.

A power amplifier comprises a first transistor, a first transformer, a first variable resistor, a first bias circuit and coupling circuitry configured to couple the first transformer, a first end of the first variable resistor, and a collector of the first transistor at a first node, the first transformer and a second end of the first variable resistor at a second node, and the bias circuit and a base of the first transistor at a third node.

An amplifier unit includes an amplifier, a bias circuit, an inductor, a variable resistor circuit, and a control circuit. The amplifier includes an amplifier transistor that amplifies an input radio-frequency signal. The bias circuit is connected to the amplifier. The inductor is connected between and in series with the amplifier and the bias circuit. The variable resistor circuit is connected to the inductor. The control circuit includes a measuring circuit and a comparison circuit. The measuring circuit measures an amplification characteristic value of the amplifier transistor. The comparison circuit compares the amplification characteristic value measured by the measuring circuit with a reference value. The control circuit controls the variable resistor circuit based on a comparison result of the comparison circuit.

A bias circuit includes first to fourth transistors and a phase compensation circuit. In the first transistor, a reference current or voltage is supplied to a first terminal, and the first terminal and a second terminal are connected. In the second transistor, a first terminal is connected to the first transistor, and a third terminal is grounded. In the third transistor, a power supply voltage is supplied to a first terminal, a second terminal is connected to the first transistor, and a bias current or voltage is supplied from a third terminal to an amplifier transistor. In the fourth transistor, a first terminal is connected to the third transistor, a second terminal is connected to the second transistor, and a third terminal is grounded. The phase compensation circuit is provided in a path extending from the fourth transistor to the third transistor through the second and first transistors.

A circuit for downlink/uplink operational mode switching in a TDD wireless communication system comprises a field-effect transistor operatively connected to a power amplifier on the downlink path of a RF front-end apparatus in a TDD wireless communication system, a first voltage generator connected to a large-value first resistor, a second voltage generator connected to a second resistor, a large-value hold capacitor, and a sample-and-hold circuit configured to be switched between a reception configuration, wherein the first voltage generator is connected to the gate of the field-effect transistor and the large-value capacitor is connected to the first voltage generator through the first resistor, and a transmission configuration, wherein the gate of the field-effect transistor is connected to the hold capacitor and the hold capacitor is connected to the second voltage generator through the second resistor.