A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor disposed on the semiconductor substrate and configured to supply a bias current based on a first current which is a part of a control current to the first transistor; a third transistor disposed on the semiconductor substrate and having a collector configured to be supplied with a second current which is a part of the control current and an emitter configured to output a third current based on the second current; a first bump electrically connected to an emitter of the first transistor and disposed so as to overlap a first disposition area in which the first transistor is disposed in plan view of the semiconductor substrate; and a second bump disposed so as to overlap a second disposition area in which the third transistor is disposed in the plan view.

A circuit system for providing thermal stability to a transistor may include: a comparing circuit in electrical communication with the transistor for receiving a present voltage from the transistor and comparing a present voltage to a predetermined bias voltage; a logic gate electronically coupled to an output of the comparing circuit, the logic gate, gate having a high, open position and a low, closed position; and a heating element thermally coupled to the transistor and electrically coupled to the output of the comparing circuit, wherein when the present voltage is lower than the predetermined bias voltage, the gate is in the high, open position providing current to the heating element, and wherein when the present voltage is higher than the predetermine bias voltage the gate is in the low, closed position.

According to at least one example, an amplifier circuit includes an amplifier and a temperature sensor circuit. The temperature sensor circuit includes a first transistor thermally isolated from the amplifier and being configured to sense an ambient temperature, and a second transistor thermally linked to the amplifier and being configured to sense a temperature at the amplifier, the temperature sensor circuit being a differential circuit having a first path and a second path with the first and second transistors being arranged on the first and second paths of the differential circuit respectively. The temperature sensor circuit is configured to generate an output voltage inversely proportional to a temperature difference between the ambient temperature and the temperature at the amplifier.

An electronic device and method thereof of are provided to prevent burnout due to overcurrent. An electronic device includes a power amplifier configured to amplify a transmission signal; a battery configured to provide a bias voltage to the at least one power amplifier; and an overcurrent protection circuit configured to prevent overcurrent from flowing through the power amplifier. The overcurrent protection circuit includes a configurer configured to configure a reference current value, based on the power amplifier; a measurer configured to measure a bias current value due to the bias voltage; a comparator configured to compare the measured bias current value with the reference current value; and a controller configured to recognize overcurrent flowing through the power amplifier and control provision of the bias voltage, based on a result of the comparison.

A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device.

A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal; a second transistor that amplifies the second signal and outputs a third signal; a bias circuit that supplies a bias current to a base of the second transistor; and a bias adjustment circuit that adjusts the bias current by subjecting the first signal to detection. The bias adjustment circuit controls the bias current such that a first current extracted from the bias circuit depends on a magnitude of the first signal.

A power amplifier circuit includes a first transistor configured to receive a first signal at a base, amplify the first signal, and output a second signal from a collector; and a bias circuit configured to supply a bias current to the base of the first transistor. The bias circuit includes a second transistor configured to supply a bias current to the base of the first transistor, a third transistor including a base connected to a base of the second transistor and a collector connected to a collector of the second transistor, and a fourth transistor including a base connected to an emitter of the third transistor and a collector connected to an emitter of the second transistor and configured to draw at least part of the bias current.

An amplifier circuit includes an amplifier configured to receive a radio frequency (RF) input signal from an input node, a bias circuit comprising a reference transistor coupled between a reference current source and ground, and a bias transistor coupled to the reference transistor and configured to generate a main bias current to bias the amplifier, an input power sense circuit coupled to the input node, and an additional transistor coupled to the input power sense circuit and to the bias transistor, the additional transistor configured to generate an additional bias current to bias the amplifier, the additional bias current responsive to a power level of the RF input signal.

Bias arrangements for amplifiers are disclosed. An example bias arrangement for an amplifier includes a bias circuit, configured to produce a bias signal for the amplifier; a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal produced by the bias circuit to produce a modified bias signal to be provided to the amplifier; and a coupling circuit, configured to couple the bias circuit and the linearization circuit. Providing separate bias and linearization circuits coupled to one another by a coupling circuit allows separating a linearization operation from a biasing loop to overcome some drawbacks of prior art bias arrangements that utilize a single biasing loop.

An amplifier circuit includes an amplifier configured to receive a radio frequency (RF) input signal from an input node, a bias circuit comprising a reference transistor coupled between a reference current source and ground, and a bias transistor coupled to the reference transistor and configured to generate a main bias current to bias the amplifier, an input power sense circuit coupled to the input node, and an additional transistor coupled to the input power sense circuit and to the bias transistor, the additional transistor configured to generate an additional bias current to bias the amplifier, the additional bias current responsive to a power level of the RF input signal.