A push-pull amplifier includes a pair of active devices driving the primary side of a double distributed active transformer (DDAT). The primary side of the DDAT includes a cascaded arrangement of primary windings of a first set of transformers with the active devices coupled ends of cascaded arrangement of primary windings. The secondary side of the DDAT includes a cascaded arrangement of secondary windings of a second set of transformers coupled to a load. Secondary windings of the first set of transformers drive inputs of respective active stages. Outputs of the active stages drive respective primary windings of the second set of transformers.

An audio amplifier includes an operational amplifier, a replica of an output stage of the operational amplifier, and a feedback circuit configured such that, in a normal mode, an output signal of the operational amplifier is fed back to the input side of the operational amplifier, and such that, in a calibration mode, an output signal of the replica is fed back to the input side of the operational amplifier. The calibration circuit cancels out the offset voltage of the audio amplifier. An adjustment circuit changes the offset of the audio amplifier according to a control signal S1. A control circuit adjusts the control signal such that an output signal V.sub.S of the replica is within a predetermined target range in a state in which a predetermined voltage is input to the audio amplifier. Memory stores the control signal S2 acquired in the final stage.

An amplifier arrangement comprising first and second power amplifiers (T1, T2) having drains connected to positive and negative drive voltages, respectively, and gates connected to an input signal. The arrangement further comprises first and second current sensors (1, 2) for detecting first and second drain currents from the power amplifiers, processing circuitry (3) adapted to identify the smallest drain current, and a feedback control loop (5) and means for driving a bias current dependent on a feedback signal through a resistor connected between the input signal and the gate of an inactive one of the first and second power amplifiers. The control loop will keep the idle current constant in the transistor with the lowest current (the inactive transistor). Thereby, the current running in the transistor which does not deliver current to the load will be fixed at a desired value.

A differential output stage of an amplification device, for driving a load, comprises a first and a second differential output stage portion. The first differential output stage portion comprises: a first and a second output circuit; a first driving circuit comprising a first biasing circuit; a second driving circuit comprising a second biasing circuit. The first differential output stage portion comprises: a third output circuit connected between a first node of said first biasing circuit and a first differential output terminal, having a third driving terminal connected to a first driving terminal; a fourth output circuit connected between a first node of the second biasing circuit and the first differential output terminal, having a fourth driving terminal connected to a second driving terminal.

A high-speed, high-power gallium-nitride-based (GaN-based) operational amplifier (opamp) and a GaN-based high-power, wideband linear amplitude modulator (LAM) that may be used to implement a dynamic power supply (DPS) in a high-power, wideband polar modulator are disclosed. The high-speed, high-power GaN-based opamp comprises an input differential amplifier having an input-DC-offset-minimizing circuit and a class AB push-pull output stage including an efficiency-enhancing source follower control circuit that provides for a unique and modified form of buffered frequency compensation. The GaN-based high-power, wideband LAM comprises an input differential amplifier having an input-DC-offset-minimizing circuit, similar to that used in the GaN-based opamp, and a current boost circuit that maintains a source follower in an output stage of the LAM in saturation during times the LAM's output voltage is low.

A push-pull source follower circuit includes a main source follower, a first biasing circuit, and a second biasing circuit. The main source follower includes a first transistor and a second transistor between a first power rail and a second power rail, where the first transistor and the second transistor include an N-type transistor and a P-type transistor. The first biasing circuit programs a bias current of the main source follower through generating a first bias voltage of the first transistor. The second biasing circuit programs an output mean voltage of the push-pull source follower circuit through generating a second bias voltage of the second transistor. The bias current and the output mean voltage are programmed independently.