An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage. Each particular buffer of the plurality of buffers may include a buffering subcircuit configured to buffer the respective component of the differential pulse-width modulation input signal associated with the particular buffer in order to generate the respective buffered component and a biasing subcircuit configured to limit a magnitude of the respective component of the differential pulse-width modulation input signal driven to circuitry of the buffering subcircuit for driving the respective buffered component.

A circuit includes a first biasing voltage source, a second biasing voltage source, a first resistor device coupled between the first biasing voltage source and a first terminal of the circuit, a second resistor device coupled between the second biasing voltage source and a second terminal of the circuit, a third resistor device coupled between the second biasing voltage source and a third terminal, a first capacitor coupled between the third terminal and ground, and an amplifier having an input coupled to the second terminal and an output coupled to a circuit output.

A circuit for processing an N-level pulse amplitude modulation (PAM-N) signal according to an embodiment of the present invention comprises: an input unit receiving an input signal; a main amplifier connected to the input unit to amplify the input signal with a first gain; and an output unit outputting an output signal of the main amplifier, and the circuit further comprises an auxiliary amplifier connected in parallel with the main amplifier between the input unit and the output unit to variably amplify at least a portion of the input signal and apply the signal to the output unit according to a linearity improvement control signal corresponding to the output signal.

A dual-drive power amplifier (PA) where the PA core includes a differential pair of transistors M1 and M2 that are driven by a coupling network having two transmission-line couplers, where a first transmission line section of a coupler is configured to transmit an input signal Vin through to drive a gate of the opposite transistor, while the second transmission line section is grounded at one end and coupled with the first transmission line section such that a coupled portion αVin of the input signal Vin drives the source terminal of a corresponding transistor. The arrangement of the coupling network allows the source terminals to be driven below ground potential. Embodiments disclosed here further provide an input matching network, a driver, an inter-stage matching network, and an output network for practical implementation of the PA core.

Differential amplifier circuitry including: first and second main transistors of a given conductivity type; and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.

Circuits and methods for achieving good amplifier AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance. Embodiments compensate for a non-linear distortion profile (e.g., an AM-PM and/or AM-AM profile) in an amplifier by pre-processing an input signal, such as a radio-frequency signal, to alter the non-linear distortion profile of the input signal so as to compensate for the non-linear distortion profile imposed by a coupled device, such as an amplifier. An inventive aspect includes linearizing an output from an amplifier having a first non-linear distortion profile, including passing an input signal having a second non-linear distortion profile through a reflective hybrid coupler to a non-linear termination circuit, and reflecting a modified input signal from the non-linear termination circuit back through the reflective hybrid coupler as an output signal, the output signal having a third non-linear distortion profile shaped to compensate for the first non-linear distortion profile.

A circuit is provided. In some examples, the circuit includes a first transistor having a gate and a drain coupled together and a current source coupled to the drain of the first transistor. A second transistor has a drain coupled to a source of the first transistor. A third transistor has a gate coupled to the gate of the first transistor. A fourth transistor has a drain coupled to a source of the third transistor and a gate of the fourth transistor is coupled to a gate of the second transistor. In some examples, the third transistor is configured to limit a first current between the third transistor and the fourth transistor based on an output voltage.

A dual-band low-noise amplifier circuit includes an amplification sub-circuit and a switch frequency selection circuit; the amplification sub-circuit is used for performing gain amplification on a radio frequency signal to be amplified to obtain an amplified radio frequency signal, and outputting the amplified radio frequency signal; the switch frequency selection circuit is connected to the amplification sub-circuit, and is used for controlling the state of a switch in the switch frequency selection circuit on the basis of a target frequency band corresponding to the radio frequency signal to be amplified, so that the dual-band low-noise amplifier circuit meets optimal performance in the target frequency band. In this way, low-noise amplification of dual-band signals is achieved by means of the reconfigurable structure of the low-noise amplifier circuit, and parameters such as noise figure, gain, and linearity can be kept in optimal states in each frequency band.

A radio frequency power amplifier and a device are disclosed. A first microstrip line and a second microstrip line are coupled, one end of the second microstrip line is an open stub and another end of the second microstrip line is grounded; and the first microstrip line having a first width is connected to a first transmission line having a second width which is wider than the first width. Therefore, some harmonic bands suppression can be implemented independently. Furthermore, the harmonic termination is independent and may not impact one or more fundamental components during matching a network. In addition, it may not take up more space and is sufficiently compact. Furthermore, sufficient wide harmonic response bandwidth can be provided.

Differential amplifier circuitry including: first and second main transistors of a given conductivity type: and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.