Gallium nitride based RF transistor amplifiers include a semiconductor structure having a gallium nitride based channel layer and a gallium nitride based barrier layer thereon, and are configured to operate at a specific direct current drain-to-source bias voltage. These amplifiers are configured to have a normalized drain-to-gate capacitance at the direct current drain-to-source bias voltage, and to have a second normalized drain-to-gate capacitance at two-thirds the direct current drain-to-source bias voltage, where the second normalized drain-to-gate capacitance is less than twice the first normalized drain-to-gate capacitance.

An aspect of the disclosure relates to a method of reducing a third-order intermodulation component at a first terminal of a transistor, including: receiving an input radio frequency (RF) signal cycling with a first frequency at a control terminal of the transistor; generating a feedback RF signal cycling at a second frequency at a second terminal of the transistor, wherein the second frequency is substantially twice the first frequency; and generating a third-order intermodulation cancellation component at the first terminal including combining the input RF signal with the feedback RF signal, wherein the third-order intermodulation cancellation component has a magnitude and phase substantially equal to and opposite a magnitude and phase of the third-order intermodulation component at the first terminal of the transistor, respectively.

A circuit includes a main amplifier having a first input and a first output. A main bias circuit is coupled to the main amplifier, and the main bias circuit configured to operate the main amplifier in a first frequency band. A feedforward cancellation amplifier has a second input and a second output, in which the second input is coupled to the first input, and the second output is coupled to the first output. A filter is coupled between the first input and the second input. A feedforward bias circuit is coupled to the feedforward cancellation amplifier. The feedforward bias circuit is configured to operate the feedforward cancellation amplifier in a second frequency band within and narrower than the first frequency band.

An amplifier and corresponding method include a field-effect transistor (FET) amplifier and a cascode FET. Each FET may operate with a positive ratio between its third-order nonlinearity coefficient and its linear gain. An inductor added at a gate of the cascode FET, operatively coupled with other components in a circuit, results in a first equivalent impedance looking into an input of the cascode FET. The first equivalent impedance may substantially offset a distortion output of the FET amplifier based upon the added inductor. The inductor operatively coupled with the circuit may result in a second equivalent impedance looking out of the gate of the cascode FET. The second equivalent impedance may substantially offset a distortion output of the cascode FET based upon the added inductor. In addition, a programmable capacitor connected between the gate and drain of the cascode FET may further substantially offset a distortion output of each FET.

This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. The system for envelope tracking comprising: a transistor; an RF transistor; a driver; a switcher current source; and a subtracting network; wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions.

A radio frequency transceiver device includes an antenna unit, a first matching circuit, a receiver circuit, a second matching circuit, a transmitter circuit, and an auxiliary circuit. The receiver circuit includes a mixer unit. The auxiliary circuit includes a first transformer coil and a second transformer coil. The first matching circuit and the receiver circuit are configured to form a first signal reception channel to receive, process, and transmit the first radio frequency signal to the mixer unit when the first radio frequency signal is a high gain radio frequency signal. The second matching circuit and the auxiliary circuit are configured to form a second signal reception channel to receive, process, and transmit the first radio frequency signal to the mixer unit when the first radio frequency signal is a middle-low gain radio frequency signal. Another radio frequency signal transceiver device further includes a third matching circuit.

The present disclosure relates to semiconductor structures and, more particularly, to a differential circuit with automatic parasitic neutralization and gain boost and methods of manufacture. The structure includes a plurality of auxiliary circuit devices with back-gate controls to perform a boost gain, and a differential pair of circuit devices which are connected to the auxiliary circuit devices.

A voltage controlled oscillator (VCO) is disclosed. The VCO includes an active device. The VCO comprises an active device, wherein the active device further includes an n-type transistor having a drain, gate and bulk; a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor share a common source. The active device further includes a first capacitor coupled between the gate of n-type transistor and the gate of p-type transistor; a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor; and a third capacitor coupled between the bulk of n-type transistor and the bulk of p-type transistor. The VCO includes a tuning block coupled to the common source to form a common gate amplifier and at least one tuning element coupled to the active device for changing the overall capacitance of the VCO.

An apparatus includes a radio-frequency (RF) circuit, which includes a power amplifier coupled to receive an RF input signal and to provide an RF output signal in response to a modified bias signal. The RF circuit further includes a bias path circuit coupled to modify a bias signal as a function of a characteristic of an input signal to generate the modified bias signal. The bias path circuit provides the modified bias signal to the power amplifier.

A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.