A power amplifying apparatus includes a first bias circuit that generates a first bias current having a first magnitude, a first amplification circuit connected between a first node and a second node, and that receives the first bias current, amplifies a signal input through the first node, and outputs a first amplified signal to the second node, a second bias circuit that generates a second bias current having a second magnitude that is different from the first magnitude of the first bias current, and a second amplification circuit connected in parallel with the first amplification circuit between the first node and the second node, and that receives the second bias current, amplifies the signal input through the first node, and outputs a second amplified signal to the second node, wherein the second amplification circuit may have a size that is different from a size of the first amplification circuit.

A power amplifying apparatus includes a first bias circuit configured to generate a first bias current, a first amplification circuit, configured to receive the first bias current, amplify a signal input to the first amplification circuit through a first node, and output a first amplified signal to a second node, a second bias circuit, configured to generate a second bias current which has a magnitude different from a magnitude of the first bias current, and a second amplification circuit, connected in parallel with the first amplification, configured to receive the second bias current, amplify the signal input through the first node, and output a second amplified signal to the second node. The second amplification circuit is configured to output the second amplified signal with a third-harmonic component that has a phase offsetting a third-order intermodulation distortion (IM3) component included in the first amplified signal, based on the second bias current.

A multistage amplifier includes: N amplifiers (N2), a (k+1).sup.th amplifier cascaded to a k.sup.th amplifier (1kN1), and each amplifier being configured to amplify a multicarrier signal; and an extraction circuit including an input and an output, the input being connected to an output of a j.sup.th amplifier (1jN1), and the output providing a compensation signal to an input of a (j+1).sup.th amplifier or an output of the (j+1).sup.th amplifier. The extraction circuit includes a filter circuit connected to the output of the j.sup.th amplifier that extracts a distortion frequency component of n times a differential frequency f2f1 (n1), a phase shifter cascaded to the filter circuit that shifts a phase of the component, and a gain adjustment circuit cascaded to the phase shifter that adjusts an amplitude of the component and generates the compensation signal.

An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.

A wideband, frequency agile, radio frequency digital-to-analog converter (RF-DAC) based phase modulator includes first, second, and third RF-DACs, each configured to upconvert an input I/Q digital baseband signal pair to a local oscillator (LO) frequency but with the first RF-DAC being driven by a first set of LO clocks, the second RF-DAC being driven by a second set of LO clocks that is forty-five degrees out of phase with respect to the first set of LO clocks, and the third RF-DAC being driven by a third set of LO clocks that is a further forty-five degrees out of phase with respect to the second set of LO clocks. First, second, and third upconverted analog signals produced by the first, second, and third RF-DACs are combined to reinforce the fundamental LO component while canceling 3.sup.rd-order and 5.sup.th-order LO harmonics.

Methods and systems for optimizing amplifier operations are described. The described methods and systems particularly describe a feed-forward control circuit that may also be used as a feed-back control circuit in certain applications. The feed-forward control circuit provides a control signal that may be used to configure an amplifier in a variety of ways.

The present disclosure relates to a power amplifier (PA) system provided in a semiconductor device and having feed forward gain control. The PA system comprises a transmit path and control circuitry. The transmit path is configured to amplify an input radio frequency (RF) signal and comprises a first tank circuit and a PA stage. The control circuitry is configured to detect a power level associated with the input RF signal and control a first bias signal provided to the PA stage based on a first function of the power level and control a quality factor (Q) of the first tank circuit based on a second function of the power level.

A multistage power amplifier includes a first amplification circuit disposed in a front stage of the multistage power amplifier, a first bias circuit configured to output a first bias current, a bias path circuit, an envelope detection circuit, and an alternating current (AC) path circuit. The envelope detection circuit is configured to output a direct current (DC) detection voltage based on an envelope signal of a radio frequency (RF) signal input to the first amplification circuit. The AC path circuit is configured to branch an AC signal from an input terminal of the first amplification circuit and transfer the AC signal to the first bias circuit, upon the first amplification circuit operating in a high power driving region based on the DC detection voltage. The first bias circuit is configured to compensate for the first bias current based on the AC signal transferred through the AC path circuit.

Methods and systems for optimizing amplifier operations are described. The described methods and systems particularly describe a feed-forward control circuit that may also be used as a feed-back control circuit in certain applications. The feed-forward control circuit provides a control signal that may be used to configure an amplifier in a variety of ways.

This application relates to amplifier circuitry, in particular class-D amplifiers, operable in open-loop and closed-loop modes. An amplifier (300) has a forward signal path for receiving an input signal (S.sub.IN) and outputting an output signal (S.sub.OUT) and a feedback path operable to provide a feedback signal (S.sub.FB) from the output. A feedforward path provide a feedforward signal (S.sub.FF) from the input and a combiner (105) is operable to determine an error signal () based on a difference between the feedback signal and the feedforward signal. The feedforward comprises a compensation module (201) configured to apply a controlled transfer function to the feedforward signal in the closed-loop mode of operation, such that an overall transfer function for the amplifier is substantially the same in the closed-loop mode of operation and the open-loop mode of operation.