Patent classifications
H03F1/342
High bandwidth continuous time linear equalization circuit
A high bandwidth continuous time linear equalization (HBCTLE) circuit is disclosed. The HBCTLE circuit includes a continuous time linear equalization (CTLE) circuit and a gain circuit coupled with an output of the CTLE circuit. A feedback circuit is coupled between the output of the CTLE circuit and an output of the gain circuit.
Cascode amplifier circuit
An amplifier circuit is a cascade amplifier circuit that includes a first transistor circuit including a signal input portion to which a signal is input from outside; a load circuit connected between the first transistor circuit and a power-supply line; and a second transistor cascode-connected between the load circuit and the first transistor circuit. The first transistor circuit is constituted by a plurality of transistors connected in parallel, and a bias circuit is provided that selectively supplies a bias voltage to the plurality of transistors.
Amplifier circuit
Linearity is improved in an amplifier circuit without lowering gain. The amplifier circuit includes a transistor, a load, an impedance element, and a variable current source. The transistor amplifies an input signal. The load is connected between the transistor and a power supply. The impedance element is connected between the transistor and a ground terminal, and passes a direct current. The variable current source is connected to a connection part between the transistor and the impedance element, and supplies a current in accordance with a voltage of the connection part.
OPTICAL RECEPTION DEVICE, STATION-SIDE DEVICE, PON SYSTEM, PREAMPLIFIER, OPTICAL RECEPTION METHOD, AND METHOD FOR SUPPRESSING OUTPUT INVERSION OF INTEGRATOR
An optical reception device includes: a light receiving element; an amplifier which receives and amplifies a current based on an input current from the light receiving element; a direct-current adjustment circuit which removes an offset current included in the input current; an alternating-current adjustment circuit which causes a part of the input current to flow therein; and a controller which controls the direct-current adjustment circuit and the alternating-current adjustment circuit. The controller includes an integrator configured to integrate an output of the amplifier and output a resultant output to two electric paths of a positive phase and a negative phase, and an inversion suppression circuit configured to operate so as to inject a current to the positive phase and extract a current from the negative phase when a negative phase potential of an output of the integrator is higher than a positive phase potential thereof.
PARALLEL INPUT AND DYNAMIC CASCADED OPERATIONAL TRANSCONDUCTANCE AMPLIFIER ACHIEVING HIGH PRECISION WITH PHASE SHIFTING
A parallel input and dynamic cascaded OTA (operational transconductance amplifier includes: plural sub-OTAs which generate corresponding plural transconductance output currents according to corresponding plural differential input voltages; and at least one cascading capacitor which is cascaded between a first sub-OTA and a second sub-OTA. A second transconductance output current generated by the second sub-OTA is coupled through the cascading capacitor to generate a transient bias current on a common mode bias node of the first sub-OTA, thus providing the transient bias current to a differential pair circuit of the first sub-OTA in a case when a transient variation occurs in the differential input voltage corresponding to the first sub-OTA, so that a loop bandwidth and a response speed during a transient state are enhanced.
THIN FILM TRANSISTOR-BASED BOOTSTRAP STRUCTURE AMPLIFIER AND CHIP
The present disclosure discloses a thin film transistor (TFT)-based bootstrap structure amplifier, and a chip. The amplifier includes an input circuit, an output buffer, and several bootstrap structure units. The bootstrap structure units include a TFT and a capacitor. The drain and the gate of the TFT are both connected to the same voltage node. The source of the TFT is connected to one end of the capacitor. The other end of the capacitor is connected to an output signal node. The output buffer is formed by connecting the sources and drains of several TFTs in series. Two ends of the output buffer are respectively connected to an input voltage node and an output signal node. The source of the TFT in each bootstrap structure unit is connected to the gates of the TFTs in one output buffer. The input circuit includes an input signal node, the output signal node, and a grounding node. The present disclosure can increase circuit gain and have a simple structure and low fabrication cost. The present disclosure can be widely applied to the field of integrated circuits.
DATA STORAGE DEVICE EMPLOYING AMPLIFIER FEEDBACK FOR IMPEDANCE MATCHING
A data storage device is disclosed comprising a head actuated over a magnetic media, wherein the head comprises a read element configured to generate a read signal when reading data from the magnetic media. A common-source common-gate (CS-CG) differential amplifier is coupled to the read element through a transmission line having a transmission line impedance Z.sub.0. A feedback circuit is coupled between an output of the CS-CG differential amplifier and an input of the CS-CG differential amplifier, wherein the feedback circuit is configured so that an input impedance of the CS-CG differential amplifier substantially matches the transmission line impedance Z.sub.0.
A SELF-EXCITED OSCILLATION SUPPRESSION DEVICE AND METHOD FOR THE POWER AMPLIFYING CIRCUIT
This invention relates to a self-excited oscillation suppression device and method for the power amplifying circuit, belonging to the field of electronic technology. Said power amplifying circuit includes a FET and a feedback loop. Said device includes: a first compensation circuit which is connected between a drain and a gate of the FET and a second compensation circuit which is connected in parallel with a feedback resistor of said feedback loop. It can solve self-excited oscillation caused by deep negative feedback in the existing power amplifying circuit. The first compensation circuit can shift the open-loop gain curve forward as a whole, and the second compensation circuit can speed up the closure of the feedback gain curve and the open-loop gain curve so that the two curves will close up before the self-excited oscillation; the self-excited oscillation will be suppressed, and the stability of the power amplifying circuit will be improved.
High efficiency wideband feedback amplifier
According to an embodiment of the disclosure, a series or source feedback is provided to a solid-state power amplifier to achieve improved amplifier output power, good impedance match, and low voltage standing wave ratio (VSWR). In an embodiment, an inductive element is coupled to the source of the power amplifier transistor to serve as a series or source feedback for the transistor. In an embodiment, a high-impedance transmission line such as a microstrip or coplanar waveguide is provided as an inductive element coupled to the source of the transistor. In an embodiment, a series or source feedback is provided to each amplifier in a multistage amplifier circuit.
Noise reduction in high frequency amplifiers using transmission lines to provide feedback
A circuit including an amplifier having an input and an output; and a feedback path comprising a transmission line electrically coupled or electrically connected to the output and the input. A low noise amplifier including the circuit wherein the feedback path cancels noise generated in the low noise amplifier.