An amplifier has a first amplifying circuit configured to receive a voltage input and to output an amplified current, a second amplifying circuit configured to receive the amplified current and to output an amplified voltage, the second amplifying circuit comprising a pair of feedback resistive elements, each feedback resistive element being coupled to a gate and drain of a corresponding transistor in a pair of output transistors in the second amplifying circuit, and a feedback circuit configured to provide a negative feedback loop between an input and an output of the pair of output transistors, the feedback circuit including a first transconductance amplification circuit and a first equalizing circuit.

One or more systems, devices and/or methods of use provided herein relate to a baseband filter that can be used in a current-mode end-to-end signal path. The current-mode end-to-end signal path can include a digital to analog converter (DAC) operating in current-mode and an upconverting mixer, operating in current-mode and operatively coupled to the DAC. In one or more embodiments, a device used in the signal path can comprise a baseband filter that receives an input current and outputs an output current. The baseband filter can comprise a feedback loop component having an active circuit branch and a passive circuit branch coupled in a loop. A mirroring device can be coupled to the feedback loop component and can provide an output of the device. Selectively activating the mirroring device can vary gain, such as of the mirroring device.

Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

A power amplifier, for a transmitter circuit is disclosed, which comprises at least one field-effect transistor having a gate terminal and a bulk terminal. The at least one field-effect transistor is configured to receive an input voltage at the gate terminal and a dynamic bias voltage at the bulk terminal. The power amplifier comprises a bias-voltage generation circuit configured to generate the dynamic bias voltage as a nonlinear function of an envelope of input signal. The input voltage is a linear function of the input signal. The bias-voltage generation circuit comprises a rectifier circuit configured to generate a rectified input voltage and an amplifier circuit, operatively connected to the rectifier circuit, configured to generate the dynamic bias voltage based on the rectified input voltage. The amplifier circuit is a variable-gain amplifier circuit and the power amplifier comprises a control circuit configured to tune the gain of the amplifier circuit.

A high bandwidth continuous time linear equalization (HBCTLE) circuit is disclosed. The HBCTLE circuit includes a continuous time linear equalization (CTLE) circuit and a gain circuit coupled with an output of the CTLE circuit. A feedback circuit is coupled between the output of the CTLE circuit and an output of the gain circuit.

A transimpedance amplifier may include a voltage-controlled operational amplifier having a non-inverting input connected to ground, an inverting input receiving a current signal to be amplified, an output coupled to the inverting input via a coupling resistor, and a power-down input (PWDN input) activated upon receipt of at least one power-down signal (PWDN) such that at least one internal current source is thereupon deactivated.

In an embodiment, A device includes an operational amplifier and a feedback loop. The feedback loop is coupled between a first input of the operational amplifier and an output of the operational amplifier. The feedback loop is controllable according to a saturation of the operational amplifier. In one example, the device is incorporated in a microcontroller.

A CMOS trans-impedance amplifier includes an inverting amplifier circuit and a feedback resistor. The inverting amplifier circuit includes an input end and an output end, and the feedback resistor is coupled therebetween. The inverting amplifier circuit includes at least three sequentially-connected amplifier units, and each amplifier unit includes at least three sequentially-connected nFETs, namely an input signal receiving part nFET, an intermediate part nFET and a DC signal receiving part nFET. A common connection terminal of the input signal receiving part nFET and the intermediate part nFET is configured to output an amplified voltage signal.

According to an embodiment of the disclosure, a series or source feedback is provided to a solid-state power amplifier to achieve improved amplifier output power, good impedance match, and low voltage standing wave ratio (VSWR). In an embodiment, an inductive element is coupled to the source of the power amplifier transistor to serve as a series or source feedback for the transistor. In an embodiment, a high-impedance microstrip is provided as an inductive element coupled to the source of the transistor. In an embodiment, a series or source feedback is provided to each amplifier in a multistage amplifier circuit. In an embodiment, a greater series or source feedback is provided at a later stage of a multistage amplifier circuit, whereas a smaller series or source feedback is provided at an earlier stage of the multistage amplifier circuit.