The invention relates to high-frequency amplifier apparatuses suitable for generating power outputs of at least 1 kW at frequencies of at least 2 MHz. The apparatuses include two LDMOS transistors each connected by their source connection to ground. The transistors can have the same design and can be arranged in an assembly (package). The apparatus also includes a circuit board lying flat against a metallic cooling plate and connected to the cooling plate, which can be connected to ground, and the assembly is arranged on or against the circuit board. The apparatuses have a power transformer, whose primary winding is connected to the drain connections of the transistors, and a signal transmitter. A secondary winding of the signal transmitter is connected to the gate connections of the two transistors. Each of the gate connections is connected to ground via at least one voltage-limiting structural element.

High-frequency amplifier apparatuses suitable for producing output powers of at least 1 kW at frequencies of at least 2 MHz for plasma excitation are disclosed. These high-frequency amplifiers include two transistors, the source or emitter connections of which are each connected to a ground connection point. The transistors can have an identical design and are arranged on a multilayer printed circuit board. The apparatus also includes a power transformer, the primary winding of which is connected to the drain or collector connections of the transistors. The primary winding and the secondary winding of the power transformer are each in the form of planar conductor tracks which are arranged in different upper layers of the multilayer printed circuit board.

A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.

This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable in a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.

The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

A high-power solid-state RFPA includes an output stage having a power transistor and a current enhanced driver that drives the output stage. The current enhanced driver includes an inductor and first and second transistors arranged in totem-pole-like configuration. When the first transistor is turned on and the second transistor is turned off, the inductor supplies a first charging current to the output stage, to assist in charging the input gate-source capacitor (Cgs) of the power transistor in the output stage. The first transistor further provides a second charging current that supplements the first charging current, thereby enhancing charging of the gate-source capacitor Cgs. Conversely, when the first transistor of the driver is turned off and the second transistor is turned on, the second transistor provides a discharge path through which the gate-source capacitor Cgs can discharge.

A wideband highly-linear buffer circuit exhibiting a low output impedance comprises a first PFET (PFET1), a second PFET (PFET2), a first NFET (NFET1), and a second NFET (NFET2). Sources of PFET1 and PFET2 are coupled to VDD. PFET1's drain is coupled to an output lead. PFET2 acts as a current source. NFET1's drain is coupled to PFET2's drain and to PFET1's gate. NFET1's source is coupled to the output lead. NFET2's source is coupled to ground. NFET2's drain is coupled to NFET1's source and to the output lead. NFET1's gate is AC coupled to a first input lead. In a single-ended input example, NFET2's gate is AC coupled NFET1's drain. In a differential input example, NFET2's gate is AC coupled to a second input lead. In another differential input example, PFET2 is not just a current source, but rather PFET2's gate is AC coupled to the first input lead.

In a folded cascode operational amplifier circuit, a source is connected to a back gate in each of third and fourth transistors that are cascode-connected to first and second transistors, which are an electric current source that returns an electric current signal output by a differential pair of an input stage. In the third and fourth transistors, an active parasitic element exists due to its device structure. When a falling edge signal of a rectangular wave is input, and electric current is supplied to the source of the third transistor to increase its electric potential, electric current flows into the drain from the back gate via the active parasitic element in an on state, in order to rapidly charge a capacitor. Thereby, a fifth transistor turns on within a shorter time, in order to improve an internal slew rate.

The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

An audio amplifier has an input for an audio signal being amplified and an output powering a load on the basis of the amplified audio signal; a generator of reference voltage of very high linearity and low output impedance, able to receive, as input, the audio signal to be amplified; a power current generator including a power voltage generator whose output is connected to the output of the reference voltage generator through a coupling inductance; and a signal adder introducing, for its control, as input to the power current generator, a signal representative of the current provided as output by the reference voltage generator. The signal adder is able to introduce a signal

[00001]$\left(L.Math.\frac{{\mathrm{di}}_{\mathrm{LOAD}}}{\mathrm{dt}}\right)$

representative of the product of the value of the coupling inductance and the drift with respect to time of the current

[00002]$\left(\frac{{\mathrm{di}}_{\mathrm{LOAD}}}{\mathrm{dt}}\right)$

provided to the load.