An amplifier circuit includes an input amplifier; an output unity gain buffer; and a second unity gain buffer. The output unity gain buffer and the second unity gain buffer are each configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input amplifier. A unity gain amplifier includes an input unity gain amplifier; and an output unity gain buffer and a second unity gain buffer. The buffers are configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input unity gain amplifier.

A pseudo resistance circuit is disclosed that is capable of suppressing fluctuation in resistance value with fluctuation in process or temperature and facilitating adjustment. The pseudo resistance circuit includes a first MOSFET, a second MOSFET, a first current source which generates a first current substantially proportional to absolute temperature, and voltage source which generates a first voltage, which is a substantially linear function of absolute temperature. The gate of the first MOSFET and the gate of the second MOSFET are connected together, the second MOSFET is diode-connected, the first current is supplied to the drain of the second MOSFET, the first voltage is applied to the source of the second MOSFET, and a resistor having a resistance value according to the gate voltage of the first MOSFET is formed between the drain and the source of the first MOSFET.

A boost circuit for use in a power amplifier includes a voltage-to-voltage generator, a voltage-to-current converter, and a differential current generator. The voltage-to-voltage generator is configured to generate a converting voltage according to a reference voltage, wherein the absolute value of the slope at the rising edge of the converting voltage is smaller than the absolute value of the slope at the rising edge of the reference voltage. The voltage-to-current converter is configured to generate first current according to the converting voltage, wherein the waveform of the first current corresponds to the waveform of the converting voltage. The differential current generator is configured to generator second current associated with the waveform of the reference voltage, thereby outputting operational current whose value is associated with the first current and the second current.

A current mirror circuit includes: a plurality of first transistors connected to a first power supply at their sources and to an input terminal at their gates and drains; and a second transistor connected to the first power supply at its source, to the input terminal at its gate, and to an output terminal at its drain. A switch circuit is provided between at least one of the first transistors and the input terminal. The switch circuit includes third and fourth transistors connected in series between the first transistor and the input terminal, an inverter circuit, and a fifth transistor connected between a middle node of the third and fourth transistors and an 10 output terminal of the inverter circuit. A switch control signal is given to the gates of the third to fifth transistors and to the input of the inverter circuit.

A boost circuit for use in a power amplifier includes a voltage-to-voltage generator, a voltage-to-current converter, and a differential current generator. The voltage-to-voltage generator is configured to generate a converting voltage according to a reference voltage, wherein the absolute value of the slope at the rising edge of the converting voltage is smaller than the absolute value of the slope at the rising edge of the reference voltage. The voltage-to-current converter is configured to generate first current according to the converting voltage, wherein the waveform of the first current corresponds to the waveform of the converting voltage. The differential current generator is configured to generator second current associated with the waveform of the reference voltage, thereby outputting operational current whose value is associated with the first current and the second current.

A pseudo resistance circuit is disclosed that is capable of suppressing fluctuation in resistance value with fluctuation in process or temperature and facilitating adjustment. The pseudo resistance circuit includes a first MOSFET, a second MOSFET, a first current source which generates a first current substantially proportional to absolute temperature, and voltage source which generates a first voltage, which is a substantially linear function of absolute temperature. The gate of the first MOSFET and the gate of the second MOSFET are connected together, the second MOSFET is diode-connected, the first current is supplied to the drain of the second MOSFET, the first voltage is applied to the source of the second MOSFET, and a resistor having a resistance value according to the gate voltage of the first MOSFET is formed between the drain and the source of the first MOSFET.

A semiconductor substrate includes emitter electrodes for multiple high-frequency amplifying transistors. An insulating substrate includes multiple land electrodes, ground electrodes, and multiple inductor electrodes. The land electrodes are formed on the front surface or near the front surface of the insulating substrate, and are joined to the respective emitter electrodes. The ground electrodes are formed inside the insulating substrate. Each of the inductor electrodes couples a corresponding one of the land electrodes to any of the ground electrodes in such a manner that the lengths of the coupling to the ground electrodes are individually determined.

Described are an amplifier circuits, systems, and methods for amplifying a plurality of sinusoid signals having a relative phase difference to each other. The amplifier circuit comprises a first sequence of at least three transistor amplifiers, wherein a first terminal of each transistor amplifier of the first sequence is configured to receive one respective signal of the plurality sinusoid signals. The amplifier further comprises a second sequence of at least three transistor amplifiers. A second terminal of each transistor amplifier of the second sequence is connected to a third terminal of one respective transistor amplifier of the first sequence. A first terminal of each transistor amplifier of the second sequence is connected to the third terminal of a next transistor amplifier of the second sequence. The first terminal of a last transistor amplifier is connected to the third terminal of a first transistor amplifier.

Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.

A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through an input node is disclosed. The circuit has a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of an amplified version of the input signal that passes through the input transistor. The circuit further includes a bias feedback network that includes a bias transistor and a resistive network that consists of only resistive elements such that no inductors and no capacitors are provided within the bias feedback network.