The detection matrix for an Orthogonal Differential Vector Signaling code is typically embodied as a transistor circuit with multiple active signal inputs. An alternative detection matrix approach uses passive resistor networks to sum at least some of the input terms before active detection.

A resistive element array circuit includes word lines, bit lines, resistive elements, a selector, a differential amplifier, and a ground terminal. The word lines are coupled to a power supply. The resistive elements are each disposed at an intersection of corresponding one of the word lines and corresponding one of the bit lines. The selector is configured to select one word line and one bit line. The differential amplifier includes a positive input terminal configured to be coupled to the selected one of the bit lines which is selected by the selector, a negative input terminal configured to be coupled to non-selected one of the bit lines which is not selected by the selector and to non-selected one of the word lines which is not selected by the selector, an output terminal being coupled to the negative input terminal. The ground terminal is coupled to the positive input terminal.

An amplifier stage uses a loaded transistor amplifier circuit including a load that causes greater second order harmonic distortion energy than third order harmonic distortion energy to be produced in said loaded transistor amplifier circuit for amplifying a source audio signal to produce an audio output signal. The spectrum of the fundamental orders of harmonic distortion is adjusted to improve perceived sound quality or listening enjoyment.

Provided is a pixel circuit. The pixel circuit includes a conversion element forming a voltage of an input level at a first node, a first transistor adjusting the voltage of the first node to a first level in response to a first signal received at a first time interval, a first capacitive element forming a voltage at a second node based on the voltage of the first node, a second transistor adjusting a level of the voltage of the second node to a second level in response to the first signal, a third transistor forming a voltage at a third node, a fourth transistor outputting a current in response to a second signal received in a second time interval, and a. fifth transistor adjusting the voltage of the third node to a third level in response to a third signal received in a third time interval.

A communication apparatus that comprises a second coupler to be coupled to a first coupler of a different communication apparatus by electric field coupling and/or inductive coupling, a termination resistor connected to the second coupler and having a resistance value larger than a predetermined value is provided. The communication apparatus receives a signal comprising (i) an output signal that is output from the second coupler in response to input of a transmitted signal to the first coupler, (ii) a signal obtained by performing amplification processing on the output signal, or (iii) a signal obtained by shaping, via a comparator, a signal obtained by performing amplification processing on the output signal, and processes the received signal as a signal that is obtained by reproducing the transmitted signal.

Methods, systems, and devices for varying a time average for feedback of a memory system are described. An apparatus may include a voltage supply, a memory array, and a regulator coupled with the voltage supply and memory array and configured to supply a first voltage received from the voltage supply to the memory array. The apparatus may also include a voltage sensor configured to measure a second voltage of the memory array and a digital feedback circuit coupled with the memory array and regulator and configured to generate feedback comprising information averaged over a duration based at least in part on the second voltage measured by the voltage sensor and to transmit an analog signal to the regulator based at least in part on the feedback.

A first primary line has a first node at one end and a third node at another end and transmits a radio-frequency signal between the first node and the third node. A second primary line has a second node at one end and a fourth node at another end and transmits a radio-frequency signal between the second node and the fourth node. A first secondary line has a portion connected to the second node and is electromagnetically coupled to the first primary line. The second secondary line has a portion connected to the first node and has another end connected to a portion of the first secondary line. The second secondary line is electromagnetically coupled to the second primary line. A first capacitor is connected in parallel to a portion of the second primary line or a portion of the second secondary line.

A data output device is provided. The data output device includes a converter circuit configured to generate a conversion signal based on an output signal; a boosting circuit configured to generate a boosting signal based on the output signal; and an output circuit configured to generate the output signal based on an input signal and a feedback signal, the feedback signal being based on the conversion signal and the boosting signal.

Methods, systems, and devices for varying a time average for feedback of a memory system are described. An apparatus may include a voltage supply, a memory array, and a regulator coupled with the voltage supply and memory array and configured to supply a first voltage received from the voltage supply to the memory array. The apparatus may also include a voltage sensor configured to measure a second voltage of the memory array and a digital feedback circuit coupled with the memory array and regulator and configured to generate feedback comprising information averaged over a duration based at least in part on the second voltage measured by the voltage sensor and to transmit an analog signal to the regulator based at least in part on the feedback.

A protection circuit and method for protecting driven circuitry against voltage peaks in a radio frequency signal, “V.sub.RF”, past a predetermined voltage level “V.sub.detect”. The protection circuit includes an input for receiving the radio frequency signal. The protection circuit also includes at least one amplification stage coupled to the input. The amplification stage is operable to produce an amplified signal based on V.sub.detect−V.sub.RF. The protection circuit further includes a hold circuit operable to determine, from the amplified signal produced by the amplification stage, whether a peak voltage V.sub.peak of the radio frequency signal exceeds V.sub.detect. The hold circuit is operable to output a first detection value if V.sub.peak exceeds V.sub.detect. The hold circuit is operable to output a second detection value if V.sub.peak does not exceed V.sub.detect. The protection circuit also includes a latch circuit operable to latch the detection value outputted by the hold circuit.