Patent classifications
H03F3/45071
Circuit device, physical quantity measuring device, electronic apparatus, and vehicle
A circuit device includes an analog front-end circuit that receives a target signal is input, and a processing circuit that performs arithmetic processing based on an output signal from the analog front-end circuit. The analog front-end circuit includes a plurality of comparator circuits that compare the voltage level of the target signal to a plurality of threshold voltages and output a plurality of comparison result signals. The processing circuit obtains the transition timing of the target signal based on the comparison result signals and delayed-time information of the analog front-end circuit.
CIRCUIT CHIP WITH POWER SUPPLY NOISE REJECTION
A circuit chip with power supply noise rejection includes a switch unit, an energy storage unit, and an operating circuit. The switch unit has a first connection terminal and a second connection terminal. The first connection terminal is adapted to receive a power supply voltage. The switch unit is configured to selectively turn on a first connection path between the first connection terminal and the second connection terminal according to a clock signal. The energy storage unit is coupled to the second connection terminal. When the switch unit turns on the first connection path, the energy storage unit is configured to generate a storage voltage on the second connection terminal according to the power supply voltage. The operating circuit is coupled to the second connection terminal, and the operating circuit is configured to operate according to the storage voltage.
Semiconductor device
Input unit to which a voltage is applied, current output unit that outputs a high level current or a low level current in response to the voltage applied to input unit, and stochastic circuit unit that, in response to the voltage applied to input unit, changes a probability that the high level current or the low level current is output from current output unit, in accordance with a sigmoid function used in a mathematical model of a neural activity are included.
Differential Amplifier Gated with Quantum Dots Absorbing Incident Electromagnetic Radiation
A differential amplifier includes an unmatched pair, including first quantum dots and second quantum dots, and a matched pair, including first and second phototransistors. The unmatched pair has a difference between a first spectrum absorbed by the first quantum dots and a second spectrum absorbed by the second quantum dots. Each of the first and second phototransistors includes a channel. The first quantum dots absorb the first spectrum from incident electromagnetic radiation and gate a first current through the channel of the first phototransistor, and the second quantum dots absorb the second spectrum from the incident electromagnetic radiation and gate a second current through the channel of the second phototransistor. The first and second phototransistors are coupled together for generating a differential output from the first and second currents, the differential output corresponding to the difference between the first and second spectrums within the incident electromagnetic radiation.
Variable gain amplifier and sampler offset calibration without clock recovery
Methods and systems are described for generating a time-varying information signal at an output of a variable gain amplifier (VGA), sampling, using a sampler having a vertical decision threshold associated with a target signal amplitude, the time-varying information signal asynchronously to generate a sequence of decisions from varying sampling instants in sequential signaling intervals, the sequence of decisions comprising (i) positive decisions indicating the time-varying information signal is above the target signal amplitude and (ii) negative decisions indicating the time-varying information signal is below the target signal amplitude, accumulating a ratio of positive decisions to negative decisions, and generating a gain feedback control signal to adjust a gain setting of the VGA responsive to a mismatch of the accumulated ratio with respect to a target ratio.
Constant power circuit with variable heating and measurement current capability
A system for testing a subject transistor with constant power. The system may include an amplifier, a measurement voltage source, and a exercise voltage source. The amplifier may have an output connected to a gate of the subject transistor. The amplifier may have a first input and a second input. The measurement voltage source may be connected to the first input of the amplifier for use in measuring characteristics of the subject transistor. The exercise voltage source may be connected to the first input of the amplifier for exercising the subject transistor. The second input of the amplifier may be connected to a source of the subject transistor through a resistor.
Pre-driver stage with adjustable biasing
An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.
LOW DROPOUT LINEAR VOLTAGE REGULATOR WITH COMPENSATION
The present disclosure provides a low dropout linear voltage regulator, including: an amplifier, configured to have a first input end receiving a reference voltage, a second input end configured to receive a feedback voltage, and an output end connected to a first node; an output transistor, having a control end connected to the first node, a first end connected to a first power source potential, and a second end connected to a second node and configured to provide an output voltage; a feedback circuit, connected to the second node and configured to provide the feedback voltage according to the output voltage; and a compensation circuit, comprising at least one of a first compensation amplifier, a second compensation amplifier and a first variable current source. The compensation circuit detects and suppresses a voltage transient generated when a load switching from light to heavy occurs at the second node.
Current-bootstrap comparator and operational amplifier thereof
A current-bootstrap comparator includes a receiving unit, a first current generation unit and a second current generation unit. The receiving unit receives a load voltage signal, a low threshold voltage and a high threshold voltage. The first current generation unit generates a first current. The second current generation unit generates a second current having a magnitude substantially same as a magnitude of the first current and a direction reverse to the first current. The first current and the second current are supplied to a next-stage circuit as a source current and a corresponding sink current, respectively, when the level of the load voltage signal is higher than the high threshold voltage or lower than the low threshold voltage. The magnitudes of the first current and the second current substantially equal zero when the level of the load voltage signal is between the high threshold voltage and the low threshold voltage.
Bias techniques for amplifiers with mixed polarity transistor stacks
Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.