Provided herein are amplifiers, such as buffers, with increased headroom. An amplifier stage includes a follower transistor and current source configured to receive a power supply voltage comprising an alternating current component and a direct current component. The alternating current component of the power supply voltage has substantially the same frequency and magnitude as the input signal received by the follower transistor. In radio frequency (RF) and intermediate frequency (IF) buffer applications, for example, the increased headroom can allow for linear buffering of an input signals with increased amplitude so that the output power one decibel (OP1dB) compression point can be increased.

An audio signal modulation and amplification circuit includes a common-mode electric potential controller, a carrier generator, and channel circuits. The common-mode electric potential controller is configured to generate one or more first common-mode electric potentials and second common-mode electric potentials. The carrier generator is adapted to receive the first common-mode electric potential to generate a carrier signal. Each of the channel circuits includes a filter, a comparison circuit, and a driving circuit. The filter is adapted to filter an input signal and generate a filtered signal based on a corresponding one of the second common-mode electric potentials. The comparison circuit is configured to compare the potential of the carrier signal with the potential of the filtered signal to generate a pulse-width modulation signal. The driving circuit is configured to be turned on or off in response to the pulse-width modulation signal to output a load driving signal.

A transformer is provided. The transformer includes at least one first primary turn; at least one second primary turn; and a first secondary turn and a second secondary turn. The first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn. The first secondary turn and the second secondary turn are arranged one above the other.

A method can be used to measure a load driven by a switching amplifier having a differential input, an LC output demodulator filter and a feedback network between the amplifier output and the differential input. The amplifier is AC driven in a differential and in a common mode by applying a common. The feedback network provides feedback towards the differential input from downstream the LC demodulator filter by computing the impedance of the load as a function of the differential mode output current and the common mode output current. The feedback network provides feedback towards the differential input from upstream the LC demodulator filter by measuring the impedance value of the inductor of the LC demodulator filter, and computing the impedance of the load as a function of the differential mode output current, the common mode output current and the impedance value of the inductor of the LC demodulator filter.

In one implementation, a circuit can include a reference pin and an operational amplifier that can include an output pin, an inverting input pin and a non-inverting input pin. The inverting input pin can be electrically coupled to the output pin via a first impedance and to the reference pin via a second impedance. The non-inverting input pin can be electrically coupled to the reference pin via a third impedance and can be configured to receive a detection signal. The reference pin can be configured to receive a detection reference signal associated with the detection signal.

A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.

A system for a differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of DC-blocking capacitors coupling said photodiode to said pair of input nodes; at least one resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two identical photodiode biasing resistances each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. A feedback loop for the amplifier may include source followers that are operable to level shift voltages prior to coupling capacitors that couple said photodiode to said amplifier to ensure stable bias conditions for said amplifier. The source followers may include CMOS transistors. The amplifier may be integrated in a complementary metal-oxide semiconductor (CMOS) chip, which may include a CMOS photonics chip.

A low dropout voltage regulator unit includes an error amplifier and a power stage having an output terminal that is looped back onto the error amplifier and is capable of delivering an output current to a load. The unit includes multiple main supply inputs that are intended to potentially receive, respectively, multiple different supply voltages. The power stage includes multiple power paths that are connected, respectively, between the main supply inputs and the output terminal, are individually selectable and each comprise an output transistor. The unit also includes a selector circuit connected to the main supply inputs and configured to select one of the power paths according to a selection criterion. The error amplifier includes an output stage configured to selectively control the output transistor of the selected power path.

Methods and systems are described for generating a time-varying information signal at an output of a variable gain amplifier (VGA), sampling, using a sampler having a vertical decision threshold associated with a target signal amplitude, the time-varying information signal asynchronously to generate a sequence of decisions from varying sampling instants in sequential signaling intervals, the sequence of decisions comprising (i) positive decisions indicating the time-varying information signal is above the target signal amplitude and (ii) negative decisions indicating the time-varying information signal is below the target signal amplitude, accumulating a ratio of positive decisions to negative decisions, and generating a gain feedback control signal to adjust a gain setting of the VGA responsive to a mismatch of the accumulated ratio with respect to a target ratio.

Microelectromechanical systems (MEMS) sensors and related bias voltage techniques are described. Exemplary MEMS sensors, such as exemplary MEMS acoustic sensors or microphones described herein can employ one or more bias voltage generators and single-ended or differential amplifier arrangements. Various embodiments are described that can effectively increase the bias voltage available to the sensor element without resorting to high breakdown voltage semiconductor processes. In addition, control of the one or more bias voltage generators in various operating modes is described, based on consideration of a number of factors.