A low-power, low-noise amplifier with a negative feedback loop is provided. A low noise amplifier (LNA) includes a common gate (CG) amplifier, a common source (CS) amplifier having a gate connected to a source of the CG amplifier, a differential current balancer (DCB) connected to an output end of the CG amplifier and an output end of the CS amplifier, a symmetric load connected to the DCB, and a current bleeding circuit with one end connected to the output end of the CS amplifier and another end connected to the symmetric load, the current bleeding circuit including an active element and a load corresponding to the symmetric load, and an output end of the active element is connected to a gate of the CG amplifier.

An amplifier with two parallel coupled amplifier units with inverse characteristics and in particular to the parallel coupling of a sourcing limited amplifier unit and a sinking limited amplifier unit.

The present disclosure relates an interface unit having an input for receiving an input voltage from an electrochemical measuring probe; a first transistor; a first operational amplifier; a second transistor; and a second operational amplifier. The first operational amplifier is arranged to provide a variable tension to a first source terminal of the first transistor, in accordance with a comparison between a reference voltage and a second resistor voltage, in order to control an operating point of the first transistor.

A wide band communications circuit buffer can include a pair of NPN bipolar transistor emitter followers deployed as a voltage buffer and disposed at inputs before and outputs after an equalization module, and a pair of diode connected NPN transistors deployed as a level shifter and disposed following the emitter followers before an output of the wide band driver to keep an output level at the output of the wide band buffer close to a desired level. Resistors connected between emitters and a V.sub.EE terminal can be used to further adjust the DC level. An LC tank filter can be provided between emitters of the voltage buffer components and the circuit's outputs to pass and boost high frequency signals provided to next stage components. The wide band buffer is, inter alia, appropriate for use in providing a DC level shift function as used in wired data communication systems circuitry.

A measurement circuit may include a transistor having a first terminal, a second terminal, and a third terminal, wherein the first terminal is coupled to a first reference voltage. The measurement circuit may further include a first operational amplifier including a first input coupled to the second terminal of the transistor and an output coupled to the third terminal of the transistor. The first operational amplifier may further include a second input configured to receive a second reference voltage. The measurement circuit may also include a first unity-gain voltage follower including a second operational amplifier having a first input coupled to the first input of the first operational amplifier. Methods of measuring a threshold voltage, semiconductor devices, and electronic systems are also described.

Methods and devices addressing design of reconfigurable wideband LNAs to meet stringent gain, noise figure, and linearity requirements with multiple gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements, such as 5G NR radios. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed.

A signal coupling method and apparatus is disclosed. A coupling network is coupled to convey signals from first functional circuit block to a second functional circuit block. The coupling network includes a first signal path having a first capacitor for providing AC coupling between the first and second functional circuit blocks. The coupling network further includes a second signal path in parallel with the first signal path. The second signal path includes a switched capacitor circuit coupled to receive a first common mode voltage corresponding to the first functional circuit block and a second common mode voltage corresponding to the second functional circuit block.

A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

A semiconductor circuit according to embodiments includes a circuit that includes the current source and generates the output voltage, and a voltage filter constituted by a depression-type NMOS transistor, the depression-type NMOS transistor having a source connected to a power supply side of the circuit, a gate that is grounded, and a drain to which a power supply voltage is applied. Thereby, a voltage on the power supply side of the circuit that has the current source and generates an output voltage is fixed regardless of an influence of a power supply fluctuation and suppresses a change in circuit characteristics.

A (pre) driver circuit includes first and second output terminals configured to be coupled to a power transistor. A differential stage has non-inverting and inverting inputs for receiving an input voltage. The input voltage is replicated as an output voltage across the first and second output terminals as a drive signal for the power transistor. The differential stage includes a differential transconductance amplifier in a voltage follower arrangement configured to provide continuous regulation of a voltage at the first output terminal with respect to the second output terminal.