A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier.

Apparatus and methods for a multiclass, broadband, no-load-modulation power amplifier are described. The power amplifier (500) may include a main amplifier (532) operating in a first amplification class and a plurality of peaking amplifiers (536, 537, 538) operating in a second amplification class. The main amplifier (532) and peaking amplifiers (536, 537, 538) may operate in parallel on portions of signals derived from an input signal to be amplified. The main amplifier (532) may see no modulation of its load impedance between a fully-on state of the power amplifier (all amplifiers amplifying) and a fully backed-off state (peaking amplifiers idle). By avoiding load modulation, the power amplifier (500) can exhibit improved bandwidth and efficiency compared to conventional Doherty amplifiers.

An apparatus is disclosed with an absorptive filter. In an example aspect, an apparatus has a filter including a first filter port and a second filter port. The filter also includes a hybrid coupler, a signal combiner, a first filter unit, and a second filter unit. The hybrid coupler includes a first hybrid port, a second hybrid port, and a third hybrid port, with the first hybrid port coupled to the first filter port. The signal combiner is coupled to the second filter port. The first filter unit is coupled between the second hybrid port and the signal combiner. The second filter unit is coupled between the third hybrid port and the signal combiner.

An ultra-high frequency power combiner according to the disclosure includes a first input line connected to a first input port, a second input line connected to a second input port, an output line connected to an output port, a first transmission line between the first input line and the output line, a second transmission line between the second input line and the output line, a first series capacitor, a resistor, and a second series capacitor connected in series between a first node between the first input line and the first transmission line and a second node between the second input line and the second transmission line, and a first parallel capacitor, an inductor, and a second parallel capacitor connected in parallel with the resistor and connected in series with one another.

The present invention provides a wideband Doherty power amplifier comprising: a main power amplification device; an auxiliary power amplification device arranged in parallel with the main power amplification device; and a coupled phase compensation network configured for compensating a phase shift between the main power amplification device and the auxiliary power amplification device. The phase compensation network comprising a first transmission line section; a second transmission line section extending substantially collinearly with the first transmission line section; and two pairs of end-connected coupled transmission lines connected in parallel between the first transmission line section and the second transmission line section. The provided Doherty power amplifier demonstrated operation at 6 dB back-off between 1.3-2.3 GHz with efficiency in excess of 41%, which can be used in modern and future wireless communication systems which require power amplifiers operating over a wide frequency range.

The present disclosure relates to an amplifier arrangement comprising a first amplifier, a second amplifier and an output combiner arranged to combine respective output signals of the first amplifier and the second amplifier into an output signal of the amplifier arrangement. An amplifier arrangement input signal is arranged as input signal to the first amplifier, and a difference signal, representing a difference between the amplifier arrangement input signal and a scaled output signal of the first amplifier, is arranged as input to the second amplifier. The output combiner is arranged to modulate the loads of the first amplifier and the second amplifier in dependence of the output signal of the second amplifier.

Examples disclosed herein relate to a vector modulator architecture, having an input splitter network configured to receive a radio frequency (RF) input signal and generate a plurality of quadrature signals at different phases, a variable gain amplifier (VGA) stage coupled to the input splitter network and configured to apply a first gain to one or more of the plurality of quadrature signals, a power combiner coupled to the VGA stage and configured to combine the plurality of quadrature signals into a combined RF signal, and a power amplifier (PA) stage coupled to the power combiner and configured to apply a second gain to the combined RF signal and generate an output RF signal. Other examples disclosed herein relate to an antenna system for autonomous vehicles and a radar system for use in an autonomous driving vehicle.

In some examples, a hybrid Chireix-Doherty amplifier comprises a first and second input network, a main amplifier coupled to a first output of the first input network, an auxiliary amplifier coupled to a second output of the second input network, and a combiner network. The combiner network is coupled to a first output of the main amplifier and an output of the auxiliary amplifier. The combiner network includes an output node for coupling to a load, e.g., an antenna of a base station for a radio network. The main amplifier is implemented as an inverse class-F amplifier.

A semiconductor device and an amplifier assembly implementing the semiconductor device are disclosed. The semiconductor device, which is a type of Doherty amplifier, includes first transistor elements for a carrier amplifier of the Doherty amplifier and second transistor elements for a peak amplifier. A feature of the Doherty amplifier is that the first transistor elements and the second transistor elements are disposed alternatively on a common semiconductor substrate.

The disclosure relates to a pre-5.sup.th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4.sup.th-Generation (4G) communication system such as Long-Term Evolution (LTE). A Doherty power amplifier of a wireless communication system is provided. The Doherty power amplifier includes a first power amplifier, a second power amplifier, a first transmission line, a 4-port coupler, and a load impedance, and the 4-port coupler includes a first port, a second port, a third port, and a fourth port, the first power amplifier is coupled with the 4-port coupler through the first port, the second power amplifier is coupled with the 4-port coupler through the fourth port, the load impedance is coupled with the 4-port coupler through the third port, the first transmission line is disposed between the first power amplifier and the first port of the 4-port coupler, and the second port is an output end of the power amplifier.