Software Digital Front End (SoftDFE) signal processing techniques are provided. One or more digital front end (DFE) functions are performed on a signal in software by executing one or more specialized instructions on a processor to perform the one or more digital front end (DFE) functions on the signal, wherein the processor has an instruction set comprised of one or more of linear and non-linear instructions. A block of samples comprised of a plurality of data samples is optionally formed and the digital front end (DFE) functions are performed on the block of samples. The specialized instructions can include a vector convolution function, a complex exponential function, an x.sup.k function, a vector compare instruction, a vector max( ) instruction, a vector multiplication instruction, a vector addition instruction, a vector sqrt( ) instruction, a vector 1/x instruction, and a user-defined non-linear instruction.

Methods and apparatus are provided for direct synthesis of RF signals using maximum likelihood sequence estimation. An RF digital RF input signal is synthesized by performing maximum likelihood sequence estimation on the digital RF input signal to produce a digital stream, such that after filtering by a prototype filter the produced digital stream produces a substantially minimum error. The substantially minimum error comprises a difference between a digital output of the prototype filter and the digital RF input signal. The digital stream is substantially equal to the input digital RF signal. The digital stream can be applied to an analog restitution filter, and the output of the analog restitution filter comprises an analog RF signal that approximates the digital RF input signal.

A method, system and apparatus for modelling a power amplifier and pre-distorter fed by one of a wideband signal and an intra-band carrier aggregated signal are disclosed. According to one aspect, a method includes receiving the one of the wideband signal and the intra-band carrier aggregated signal and generating a discrete base band equivalent, BBE, Volterra series based on the received signal, where the series has distortion products grouped according to determined shared kernels. The shared kernels are determined based on a transformation of a real-valued continuous-time pass band Volterra series without pruning of kernels.

This disclosure provides a circuit for linearizing an output signal Sout produced by a non-linear component based on an input signal x(n). The circuit comprises a primary pre-distorter module configured to generate a pre-distorted signal y(n) based on the input signal x(n) and a primary pre-distortion function parameterized by a pre-distortion parameter and to feed the pre-distorted signal y(n) to the non-linear component. The circuit comprises an estimation module. The estimation module is configured to receive samples z(n) of the output signal Sout, and to determine the pre-distortion parameter . The estimation module comprises a secondary pre-distorter module configured to generate a secondary pre-distorter output signal r(n) based on a secondary pre-distortion function and the samples z(n) of the output signal Sout. The secondary pre-distorter module is configured to determine the pre-distortion parameter based on a previously determined pre-distortion parameter stored on a data storage, the secondary pre-distorter output signal r(n) and the pre-distorted signal y(n) provided by the primary pre-distorted module. The determining comprises correlating the input signal x(n) with an error signal between the pre-distorted signal y(n) and the secondary pre-distorter output signal r(n).

A amplifier system may include a predistorter receiving an input signal to generate a predistortion signal, a first converter receiving the predistortion signal to generate a preamplified signal, a power amplifier receiving the preamplified signal to generate an output signal based on the preamplified signal and the input signal, and a second converter sampling the output signal to generate a feedback signal. The power amplifier may produce a distortion signal at a first frequency, the second converter may sample the output signal using a timing signal with a second frequency that is lower than the first frequency to generate the feedback signal, and the predistorter, based upon the feedback signal, may predistort the predistortion signal to reduce the distortion signal at the first frequency.

Methods, systems and apparatus for modelling a power amplifier and pre-distorter fed by a multi-band signal are disclosed. According to one aspect, a method includes receiving a multi-band signal and generating a discrete base band equivalent, BBE, Volterra series based on the received multi-band signal, where the series has distortion products grouped according to determined shared kernels. The shared kernels are determined based on a transformation of a real-valued continuous-time pass band Volterra series without pruning of kernels.

The present application relates to the field of digital pre-distortion processing. Disclosed in an embodiment of the present application are a pre-distortion parameter obtaining method and pre-distortion system for simplifying calculating complexity of a model while achieving good signal processing effect. The method comprises: after the beginning of periodic filtering processing, obtaining a pre-distorted signal after pre-distortion processing and a first feedback signal after power amplification (S101); obtaining a second feedback signal by eliminating the rated linear gain of the first feedback signal (S102); determining a pre-distortion parameter according to a matrix formed by the second feedback signal and a matrix formed by the pre-distorted signal (S103); updating the pre-distortion parameter index table according to the determined pre-distortion parameter (104).

Maximum likelihood bit-stream generation and detection techniques are provided using the M-algorithm and Infinite Impulse Response (IIR) filtering. The M-Algorithm is applied to a target input signal X to perform Maximum Likelihood Sequence Estimation on the target input signal X to produce a digital bit stream B, such that after filtering by an IIR filter, the produced digital stream Y produces an error signal satisfying one or more predefined requirements. The predefined requirements comprise, for example, a substantially minimum error. In an exemplary bit detection implementation, the target input signal X comprises an observed analog signal and the produced digital stream Y comprises a digitized output of a receive channel corresponding to a transmitted bit stream. In an exemplary bit stream generation implementation, the target input signal X comprises a desired transmit signal and the produced digital stream Y comprises an estimate of the desired transmit signal.

Circuit topologies and control methods for a dc-to-rf converter circuit are described.

Software implementations are provided for performing IQ imbalance correction and/or RF equalization. An input signal, x, is processed in software by executing a vector convolution instruction to apply the input signal, x, to a first complex FIR filter that performs one or more of RF equalization and IQ imbalance correction; and executing a vector convolution instruction to apply a conjugate x* of the input signal, x, to a second complex FIR filter that performs the one or more of RF equalization and IQ imbalance correction, wherein the second complex FIR filter is in parallel with the first complex FIR filter. The first and second complex FIR filters have complex coefficients and the input signal comprises a complex signal.