A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

A method may include, in an apparatus comprising a closed loop amplifier and a signal processing block configured to generate an amplifier input signal as a function of an upstream signal received at an input of the signal processing block, in a calibration mode of the apparatus: decoupling a second stage input of the amplifier from a first stage output of the amplifier; determining an offset signal that when applied to the input of a signal processing block as the upstream signal generates approximately zero as an intermediate signal generated by the first stage of the amplifier; and controlling one or more parameters of the apparatus based on the offset signal to compensate for an offset of at least one of the first stage and the signal processing block.

A calibration amplifier includes: a plurality of transistors and a variable resistor configured to change in response to clock pulses. During a calibration cycle, one of the plurality of transistors switches on in each calibration step based on a plurality of enable signals, and a gain of the calibration amplifier changes until an output voltage of the calibration amplifier exceeds a reference voltage and is set to a calibrated gain. The calibration amplifier outputs the output voltage by amplifying an input voltage using the calibrated gain.

An integrated circuit amplifier configurable to be either a programmable gain amplifier or an operational amplifier comprises two output blocks, one output block is optimized for programmable gain amplifier operation, and the other output block is optimized for operational amplifier applications. A common single input stage, input offset calibration and bias generation circuits are used with either amplifier configuration. Thus duplication of the input stage, offset calibration and bias generation circuits are eliminated while still selectably providing for either a programmable gain amplifier or operational amplifier configuration.

A signal processing device is configured to compensate for process and temperature variations deviating from a nominal process and temperature condition. A transconductance amplifier circuit produces a current output dependent on a voltage input and a transconductance gain. A transimpedance amplifier circuit produces a voltage output dependent on the current. A bias circuit comprises transistors (M.sub.1, M.sub.2) configured such that the gate and drain of the first transistor (M.sub.1) are connected to the gate of the second transistor (M.sub.2) and to a PTAT current source. The source of the first transistor (M.sub.1) is connected to a node via a first resistor (R.sub.1), and the source of the second transistor (M.sub.2) is connected to that node via a second, trimmable resistor (R.sub.2). A feedback circuit for the transimpedance amplifier comprises a third, trimmable resistor (R.sub.3). The ratio between a resistance of the second and third resistors (R.sub.2, R.sub.3) is constant.

Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.

Apparatuses, systems, and methods are disclosed for offset trimming for differential amplifiers. An apparatus includes a differential amplifier. A differential amplifier includes a non-inverting input, an inverting input, and an output coupled to the inverting input via a voltage divider. A first variable current source is coupled to a non-inverting input, so that increasing a current from the first variable current source increases a voltage at the non-inverting input. A second variable current source is coupled to an inverting input, and to an output via a voltage divider, so that increasing a current from the second variable current source decreases a voltage at the output.

The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifier systems of this disclosure may be configured to use a first ADC path to measure a current flowing through a device, a second ADC path to measure a common mode value, a memory element to store a calibration value, and a summer block to output a voltage proportional to the measured current through the device by correcting a voltage value output by the first ADC path based on the measured common mode value of the second ADC path and the stored calibration value.

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.