An imaging device according to the present disclosure includes a light-receiving pixel; a reference signal generator; a first amplification section; a second amplification section; a third amplification section; and a counter. The first amplification section is coupled to a first power supply node and a second power supply node. The first amplification section performs a comparison operation on the basis of a pixel signal and a reference signal. The first amplification section outputs a signal corresponding to a result of the comparison to a first node. The second amplification section includes a first transistor and a first load circuit. The first transistor includes a gate coupled to the first node, a drain coupled to a second node, and a source coupled to the second power supply node. The third amplification section includes a second transistor and a first switch. The second transistor includes a gate coupled to the second node, a source coupled to the first power supply node, and a drain coupled to a third node. The first switch applies a predetermined voltage to the third node by being turned on. The counter is coupled to a third power supply node and a fourth power supply node. The counter stops a count operation on the basis of a voltage of the third node.

The disclosure provides a circuit. The circuit includes a primary amplifier. A first common mode detector is coupled to the primary amplifier. A second common mode detector is coupled to the primary amplifier. An error correction circuit is coupled between the second common mode detector and the primary amplifier.

Certain aspects of the present disclosure provide methods and apparatus for adjusting a bandwidth of an amplifier (e.g., a programmable gain amplifier (PGA)). In certain aspects, the PGA generally includes at least one amplification stage having an input and an output, a plurality of compensation capacitors, and at least one first switch configured to selectively couple at least one capacitor of the plurality of compensation capacitors between the input and the output of the at least one amplification stage. In certain aspects, the amplifier includes at least one second switch configured to selectively couple the at least one capacitor to a node such that the at least one capacitor is coupled to only one of the output or the node, where a voltage at the node is a differential mode (DM) reference potential for the amplification stage.

A variable gain amplifier circuit includes a differential pair of transistors and a variable current source circuit. The differential pair of transistors generates an output signal based on an input signal. The variable current source circuit is coupled to the differential pair of transistors. A gain of the output signal relative to the input signal varies in response to variations in a bias current through the variable current source circuit. The variable gain amplifier circuit maintains a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit.

An optical receiver with an expanded dynamic range for an input current is disclosed. The optical receiver includes a photodiode to generate a photocurrent, a trans-impedance amplifier (TIA) to convert the photocurrent into a voltage signal, a dummy TIA with a same arrangement as that of the TIA to generate a reference, a differential amplifier to amplify a difference between the voltage signal and the reference, a current source to extract a portion of the photocurrent, and a level detector to detect an average photocurrent and adjust the reference based on the average photocurrent.

Methods, apparatus, systems, and articles of manufacture are described to regulate an amplifier. An example apparatus includes a modulator; a comparator having an input and an output, the input of the comparator coupled to an output of the modulator; a first switch having a voltage source terminal and a second terminal; a second switch having a voltage source terminal and a second terminal; a resistor having a first terminal and a second terminal, the first terminal of the resistor coupled to the second terminal of the first switch and the second terminal of the second switch; a capacitor having a terminal coupled to the second terminal of the resistor; and a buffer having an input and an output, the input of the buffer coupled to the terminal of the capacitor and the second terminal of the resistor, the output coupled to an input of the modulator.