A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.

A current steering comparator includes an amplifier circuit, a bias circuit, a latch circuit, and a detector circuit. The amplifier circuit is configured to compare a first input signal with a second input signal during a comparison phase, in order to output a first signal and a second signal. The bias circuit is configured to utilize a tunable capacitor to bias the amplifier circuit during the comparison phase. The latch circuit is configured to generate a first output signal and a second output signal according to the first signal and the second signal during the comparison phase. The detector circuit is configured to detect the first output signal and the second output signal according to a predetermined clock signal to generate a control signal, in order to adjust the tunable capacitor.

An exemplary embodiment of the invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; and a downstream amplifier stage having a first output unit and a second output unit; wherein the first output unit is connected to the first output port of the differential preamplifier and the second output unit is connected to the second output port of the differential preamplifier; and wherein a negative impedance converter is electrically located in at least one of said differential preamplifier and said downstream amplifier stage.

An amplifier includes input transconductors that receive an input signal, the input signal having a voltage swing. A supply side current mirror generates a gate voltage as a function of input signal voltage and current sources that provide a bias current of the input transconductors as a function of the gate voltage to maintain a constant bias current across the voltage swing of the input signal. Resistors average source voltages of the transconductance-cancelling transconductors to provide an average source voltage and apply the average source voltage to wells of input devices of the transconductance-cancelling transconductors to reduce back bias effect. The input devices are laid out in a same well and have a common centroid to cancel out process mismatches. A first I-DAC trims an offset of first transconductors, and a second I-DAC trims an offset of second transconductors to attain low offsets across a rail-to-rail input common mode range.

An exemplary embodiment of the invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; and a downstream amplifier stage having a first output unit and a second output unit; wherein the first output unit is connected to the first output port of the differential preamplifier and the second output unit is connected to the second output port of the differential preamplifier; and wherein a negative impedance converter is electrically located in at least one of said differential preamplifier and said downstream amplifier stage.

An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.

An operational amplifier integrated circuit includes a differential pair of transistors having a first input, a second input. A bias current generator applies a bias current to an output of the differential pair of transistors. A control loop generates a control voltage arising from a difference in potentials between the first input and the second input. An additional current that is added to the bias current is generated in response to the control voltage.

The present application discloses a transconductance amplifier and a related chip. The transconductance amplifier is configured to generate an output current according to a positive input voltage and a negative input voltage, wherein the transconductance amplifier includes: an input stage, configured to receive the positive input voltage and the negative input voltage and generate a positive output current and a negative output current, wherein the input stage includes: a first transistor, wherein a gate thereof is coupled to the positive input voltage; a second transistor, wherein a gate thereof is coupled to the negative input voltage; a first resistor, serially connected between the first transistor and the second transistor; a third transistor, wherein a source of the third transistor is coupled between the first resistor and the first transistor, and a drain of the third transistor is configured to output the positive output current; and a fourth transistor

Techniques for biasing output transistor of a push-pull amplifier output stage are provided. In certain applications the techniques can improve efficiency of the amplifier. In an example, a circuit can include an output stage including first and second output transistors, a first scaled replica transistor corresponding to the first output transistor, and an amplifier circuit in a feedback arrangement for biasing a gate of the first output transistor at a level that, at a specified stand-by current level of the first output transistor, reproduces a voltage difference between the drain and source terminals of the first output transistor across the drain and source terminals of the first replica transistor.

An integrated ultraviolet (UV) detector includes a silicon carbide (SiC) substrate, supporting metal oxide field effect transistors (MOSFETs), and PN Junction photodiodes. The MOSFET includes a first drain/source implant in the SiC substrate and a second drain/source implant in the SiC substrate. The P-N junction photodiodes include a blanket oxide over the silicon carbide substrate and the gate, an implant extending into the silicon carbide substrate, and an opening extending through the blanket oxide layer down to the silicon carbide substrate on one side of the gate of the P-N junction photodiode.