An interface circuit comprises a signal path including a front-end charge amplifier coupling an input of the interface circuit to an output of the interface circuit, and a DC control loop separate from the signal path. In some implementations, the interface circuit is part of a MEMS sensor that includes a MEMS transducer having an output coupled to the input of the interface circuit. The interface circuit can, in some cases, allow faster settling of the circuit to its steady-state operating point.

A circuit arrangement comprises a first input node, a first output node, a sampling capacitor means and a first switching means being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state. A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means in the first switching state.

A negative feedback system architecture and a loop filter thereof are provided. The negative feedback system architecture includes a loop filter, a pulse width modulation circuit, and a driver. The loop filter includes a three-stage series integrator for receiving a signal and outputting the filtered signal. The loop filter has three in-bandwidth poles and at least two in-bandwidth zeros. The pulse width modulation circuit is electrically connected to the loop filter for receiving the filtered signal and modulating it into a pulse width modulation signal to output. The driver is electrically connected to the pulse width modulation circuit and the loop filter for receiving the pulse width modulation signal to generate an output signal to drive a load device, and the output signal is fed back to the loop filter.

The present invention includes a current integrator for an organic light-emitting diode (OLED) panel. The current integrator includes an operational amplifier, which includes an output stage. The output stage, coupled to an output terminal of the current integrator, includes a first output transistor, a second output transistor, a first stack transistor and a second stack transistor. The first stack transistor is coupled between the first output transistor and the output terminal. The second stack transistor is coupled between the second output transistor and the output terminal.

A signal processing circuit, which has a pair of input nodes and a pair of output nodes, includes a first switch pair, a second switch pair, an amplifier, a first compensation capacitor and a second compensation capacitor. The first switch pair is coupled between the pair of input nodes and a plurality of floating nodes. The second switch pair is coupled between the plurality of floating nodes and the pair of output nodes. The amplifier is coupled between the plurality of floating nodes and the pair of output nodes. The first compensation capacitor is coupled between a first floating node among the plurality of floating nodes and a first output node among the pair of output nodes. The second compensation capacitor is coupled between a second floating node among the plurality of floating nodes and the first output node.

An interface circuit comprises a signal path including a front-end charge amplifier coupling an input of the interface circuit to an output of the interface circuit, and a DC control loop separate from the signal path. In some implementations, the interface circuit is part of a MEMS sensor that includes a MEMS transducer having an output coupled to the input of the interface circuit. The interface circuit can, in some cases, allow faster settling of the circuit to its steady-state operating point.

In an embodiment an integration circuit has a first input terminal configured to receive a first input signal, a second input terminal configured to receive a second input signal, an output terminal to provide an output signal as a function of the first and the second input signal, a first and a second amplifier, each being switchably connected between the first or the second input terminal and the output terminal, and a capacitor which is switchably coupled in a feedback loop either of the first or of the second amplifier such that the capacitor and one of the first and the second amplifier form an inverting integrator providing the output signal. Therein the integration circuit is prepared to be operated in a first and a second subphase, wherein in each of first and second subphases one of the first and the second input signals is supplied to the inverting integrator and the respective other one of first and the second input signals is supplied to the respective other one of the first and the second amplifier.

An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.

A data storage apparatus includes storage and a controller configured to control the storage in response to a request from a host. The controller includes an internal voltage trimming circuit which includes: an integration circuit configured to generate an integration signal by integrating a difference between a test voltage output from a device under test (DUT) and a reference voltage; a comparison circuit configured to generate a comparison signal by comparing the integration signal and the reference voltage; a transition detection circuit configured to output a detection signal according to level transition of the comparison signal; a counter configured to receive an initial trimming code and generate a preliminary trimming code by increasing or reducing the initial trimming code in response to the detection signal; and an average circuit configured to generate a final trimming code by averaging the preliminary trimming code for a determined time interval and provide the final trimming code to the storage.

A signal processing circuit, which has a pair of input nodes and a pair of output nodes, includes a first switch pair, a second switch pair, an amplifier, a first compensation capacitor and a second compensation capacitor. The first switch pair is coupled between the pair of input nodes and a plurality of floating nodes. The second switch pair is coupled between the plurality of floating nodes and the pair of output nodes. The amplifier is coupled between the plurality of floating nodes and the pair of output nodes. The first compensation capacitor is coupled between a first floating node among the plurality of floating nodes and a first output node among the pair of output nodes. The second compensation capacitor is coupled between a second floating node among the plurality of floating nodes and the first output node.