Patent classifications
H03F2203/45392
Peak detector and operational amplifier circuit therein
A peak detector utilizes two choppers to cancel offset voltage of a transconductance amplifier, so the influence of the offset voltage is preventable and the peak detection accuracy of the peak detector can be improved significantly.
VARIABLE GAIN CIRCUIT AND TRANSIMPEDANCE AMPLIFIER USING THE SAME
A transimpedance amplifier includes a variable gain circuit configured to generate a pair of complementary signals in accordance with an input signal and a reference signal. A first differential circuit of the variable gain circuit includes a first transistor including a control terminal to receive the input signal, a second transistor including a control terminal to receive the reference signal, and a variable resistance circuit including a first field effect transistor (FET) and a second FET. A first timing when a voltage of a first linearity adjustment signal input to the first FET reaches a first threshold voltage of the first FET and a second timing when a voltage of a second linearity adjustment signal input to the second FET reaches a second threshold voltage of the second FET are different from each other.
Amplifier with improved linearity
An amplifier having improved linearity is disclosed. The amplifier includes a main transistor having a first current input terminal, a first current output terminal, and a first control terminal coupled to an RF input terminal that receives a signal voltage. A cascode transistor has a second current input terminal coupled to an RF output terminal for outputting an amplified signal. The cascode transistor has a second control terminal, and a second current output terminal coupled to the first current input terminal. Linearization circuitry has a bias output terminal coupled to the second control terminal. The linearization circuitry is configured to generate a bias signal at the bias output terminal to maintain a quiescent point of the main transistor for a given load coupled to the RF output terminal such that output conductance of the main transistor decreases nonlinearly with increasing main voltage and increases nonlinearly with decreasing main voltage.
Active linearization for broadband amplifiers
For broadband data communication, a data signal voltage at a signal input node can be converted to an output signal current at a signal output node. A first transistor device can contribute to the output signal current, with its transconductance or other gain reduced to accommodate larger signal swings, at which a second transistor can turn on and increase an effective resistance value of at least a portion of a gain degeneration resistor associated with the first transistor device. The second transistor can also contribute to the output signal current to help maintain or enhance an overall gain between the signal input node and the signal output node. Multiple secondary stages, push-pull arrangements, buffer amplifier configurations (which may or may not contribute to current in the gain degeneration resistor), input and output transformers, negative feedback to help reduce component variability, and frequency modification circuits or components are also described.
Dynamic Correction Of Gain Error In Current-Feedback Instrumentation Amplifiers
A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.
DIFFERENTIAL AMPLIFIER WITH EXTENDED BANDWIDTH AND THD REDUCTION
The present invention is directed to electrical circuits. More specifically, an embodiment of the present invention provides a differential amplifier in cascode configuration. An input transistor is coupled to an output transistor via a peaking inductor. The output transistor is also directly coupled to a degeneration resistor. There are other embodiments as well.
Differential amplifier with extended bandwidth and THD reduction
The present invention is directed to electrical circuits. More specifically, an embodiment of the present invention provides a differential amplifier in cascode configuration. An input transistor is coupled to an output transistor via a peaking inductor. The output transistor is also directly coupled to a degeneration resistor. There are other embodiments as well.
Operational Amplifier, Driving Interface, Measurement and Control Device, Driving Circuit and Driver
An operational amplifier, a driving interface, a measurement and control device, a driving circuit and a driver are provided. The operational amplifier is used as at least one of an input interface and output interface, and when the operational amplifier corresponds to one transistor (Q), an external circuit of the transistor further includes: a first port (Vdj), connected with a base (B) of the transistor (Q) through a first resistor (Rb); a second port (I/Oe), connected with an emitter of the transistor (Q); a third port (I/Oc), connected with a collector (C) of the transistor (Q); and a fourth port (GND), connected with the emitter (E) of the transistor (Q) through a second resistor and used as a public port for signal input and signal output.
DRIVER CIRCUIT
A traveling wave amplifier includes two input-side lines, two output-side lines, and amplification cells, and the amplification cells include a first input terminal, a second input terminal, a transistor including a base connected to the first input terminal and a collector connected to one of the output-side lines, a transistor including a base connected to the second input terminal and a collector connected to the other output-side line, a current source connected to an emitter of the two transistors, a series circuit having one end connected to the collector of the other transistor and the other end connected to the base of the one transistor and including a capacitor and a resistor, and a series circuit having one end connected to the collector of the one transistor and the other end connected to the base of the other transistor and including a capacitor and a resistor.
BIAS MODULATION ACTIVE LINEARIZATION FOR BROADBAND AMPLIFIERS
A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a common emitter bias node of a differential pair of transistors to provide a dynamic variable bias current thereto as a function of an input signal amplitude of an input signal. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the frequency content of the input signal. A delay in the signal path to the differential pair can phase-align the bias current to the amplification by the differential pair. A dynamic variable supply voltage can be based on an envelope of the input signal.