A line driver circuit includes a first input terminal, a second input terminal, a first input stage, a second input stage, a first output stage, and a second output stage. The first input stage includes a first input coupled to the first input terminal, and a second input coupled to the second input terminal. The second input stage includes a first input coupled to the first input terminal, and a second input coupled to the second input terminal. The first output stage includes a first input coupled to a first output terminal of the first input stage and a second input coupled to a first output terminal of the first input stage. A second output stage includes a first input coupled to a second output terminal of the first input stage and a second input coupled to a second output terminal of the first input stage.

A fully differential amplifier includes: an input stage comprising a first amplification circuit and a second amplification circuit, one of which is configured to generate a push signal and the other of which is configured to generate a pull signal, each by amplifying a differential input signal; an output stage for generating a differential output signal based on the push signal and the pull signal; and a feedback circuit for providing common mode feedback to the first amplification circuit based on the differential output signal, wherein the second amplification circuit may include a passive network for setting a common mode voltage of the push signal or the pull signal.

Implementations provide a receiver circuit that includes: an alternate current (AC)-coupling network to filter an input signal, the AC-coupling network including a first RC filter connected between a first input node and a first common node and a second RC filter connected between a second input node and the first common node; a differential amplifier coupled to the AC-coupling network and configured to receive a filtered input signal from the AC-coupling network and generate an output signal, the differential amplifier including a differential pair of transistors and a common-mode measurement network coupled to source terminals of a first and a second transistors in the differential pair; and a first operational amplifier having an input coupled to output terminal of the common-mode measurement network and an output coupled to the first common node.

An embodiment of an amplifier circuit includes first, second, and third amplifiers. The first and second amplifiers, each of which can be a respective operational amplifier or a respective transconductance amplifier, are configured to amplify a differential input signal with a non-inverting gain. And the third amplifier, which can be an operational amplifier or a transconductance amplifier, is configured to cause the first and second amplifiers to amplify a common-mode input signal with a gain that is less than unity. The third amplifier can also be configured to cause the first and second amplifiers to generate a common-mode output voltage that is substantially independent of the common-mode input voltage. Consequently, in addition to presenting a high input impedance and a low noise factor, such an amplifier circuit has a configurable common-mode output voltage and has a lower common-mode gain (e.g., less than unity, approaching zero) than other non-inverting differential amplifiers.

An apparatus measures a speaker impedance. A DAC converts a known digital input signal to an audio frequency first analog voltage signal. Resistors with known resistance attenuate the first analog voltage signal to generate a current. The known resistance effectively determines the current because the known resistance is high relative to the speaker impedance. The current is sourced into the speaker to generate a second analog voltage signal. The known resistance is sufficiently high to cause the second analog voltage signal to be inaudible as transduced by the speaker. An amplifier amplifies the second analog voltage signal with a known gain to generate a third analog voltage signal. An ADC converts the third analog voltage signal to a digital output signal. A processing element calculates the impedance of the speaker proportional to the digital output signal based on the known digital input signal, the known resistance, and the known gain.

A circuit includes an analog-to-digital converter (ADC). The circuit also includes an analog front end (AFE) having an AFE input and an AFE output. The AFE output is coupled the ADC's input. The AFE includes a programmable gain amplifier (PGA) having a first PGA input and a second PGA input. The PGA includes a first operational amplifier (OP AMP) with first and second OPAMP inputs. The AFE also including a programmable resistance circuit having a first programmable resistance circuit input and first and second programmable resistance circuit outputs. The first programmable resistance circuit input is coupled to the first and second PGA inputs. The programmable resistance circuit includes a resistor network having first and second balance resistances. The first balance resistance is coupled to the first and second OP AMP inputs, and the second balance resistance is coupled to the first and second OP AMP inputs.

Implementations provide a receiver circuit that includes: an alternate current (AC)-coupling network to filter an input signal, the AC-coupling network including a first RC filter connected between a first input node and a first common node and a second RC filter connected between a second input node and the first common node; a differential amplifier coupled to the AC-coupling network and configured to receive a filtered input signal from the AC-coupling network and generate an output signal, the differential amplifier including a differential pair of transistors and a common-mode measurement network coupled to source terminals of a first and a second transistors in the differential pair; and a first operational amplifier having an input coupled to output terminal of the common-mode measurement network and an output coupled to the first common node.

The present invention provides a circuit including a reference voltage generator and a plurality of receivers, wherein the reference voltage generator is configured to generate a reference voltage, and each of the receivers is configured to receive the reference voltage and a corresponding input signal to generate a corresponding output signal. In addition, for at least a specific receiver of the plurality of receivers, the specific receiver comprises at least one amplifying stage, the amplifying stage comprises a first input terminal configured to receive the corresponding input signal, a second input terminal configured to receive the reference voltage, a first output terminal configured to generate a first signal, and a second output terminal configured to generate a second signal; and the specific receiver further comprises a first feedback circuit coupled between the first output terminal and the second input terminal.

A low energy transmitter is provided. The transmitter includes an antenna circuit wherein the antenna circuit has an antenna positive node interface (Vop) and an antenna negative node interface (Von); a reference voltage source that supplies a reference voltage to the antenna circuit; and a common mode feedback (CMFB) circuit coupled to the antenna circuit that receives from the antenna circuit inputs from the Vop and the Von and supplies at least one signal to the antenna circuit.

There is provided a chopper stabilized amplifier with an input bias current reduced. The chopper stabilized amplifier includes a main amplifier and a correction circuit. The correction circuit includes a second gm amplifier of a full differential type. A first selector and the second gm amplifier are coupled to each other without DC blocking capacitors. The differential input state of the second gm amplifier is configured with a depletion-type transistor.