An operational amplifier includes a differential amplification circuit configured to receive and amplify an input voltage to generate an output voltage, and receive a feedback signal, and the feedback signal adjusts a common-mode voltage of the output voltage, a reference voltage generation circuit configured to detect status information of the operational amplifier, and generate a reference voltage based on the status information, where the status information includes a temperature or an operating voltage of the operational amplifier, and a common-mode feedback circuit configured to receive the output voltage and the reference voltage, and provide the feedback signal to the differential amplification circuit based on the output voltage and the reference voltage.

A signal processing circuit includes a signal receiving circuit for generating a first input signal and a second input signal; a signal output circuit for generating a first output signal and a second output signal according to the first input signal and the second input signal; a negative impedance circuit, for amplifying the first input signal at the first input terminal to generate a first amplified input signal at the second output terminal, and for amplifying the second input signal at the second input terminal to generate a second amplified input signal at the first output terminal; a first capacitor; a second capacitor; wherein the first capacitor and the second capacitor have different DC voltage levels at both terminals, such that the impedance-signal variation rate of the negative impedance circuit is lower than a predetermined level.

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

Disclosed is a differential amplifier including an input circuit, a detecting and controlling circuit, and an output circuit. The input circuit outputs input current to two output nodes according to the voltage of a differential input signal and the voltage of a bias node. The detecting and controlling circuit outputs compensative current to the two output nodes according to control bias voltage and the voltage of the bias node, in which the voltage of the bias node and the compensative current relate to the voltage of the differential input signal. The output circuit is coupled to the two output nodes and outputs a differential output signal according to the sum of the input current and the compensative current. Due to the detecting and controlling circuit outputting the compensative current, the differential amplifier prevents itself from entering a deadlock state even though the input current is insufficient or zero.

Disclosed include methods and devices for enabling a battery free Bluetooth low energy communication. Some embodiments include a transmitter and a reference voltage generator supplying a voltage to an oscillator circuit. Further, some embodiments include an oscillator circuit including two pairs of semiconductor devices, wherein each pair of a semiconductor device includes a device with a gate node coupled to an antenna positive node interface (Vop) via a capacitor and a drain connected to an antenna negative node interface (Von) and a device with a gate node coupled to an antenna positive node interface (Von) via a capacitor and a drain connected to an antenna negative node interface (Vop). Additionally, some embodiments include an oscillator circuit connected to a common mode feedback circuit.

In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.

An embodiment of an amplifier circuit includes first, second, and third amplifiers. The first and second amplifiers, each of which can be a respective operational amplifier or a respective transconductance amplifier, are configured to amplify a differential input signal with a non-inverting gain. And the third amplifier, which can be an operational amplifier or a transconductance amplifier, is configured to cause the first and second amplifiers to amplify a common-mode input signal with a gain that is less than unity. The third amplifier can also be configured to cause the first and second amplifiers to generate a common-mode output voltage that is substantially independent of the common-mode input voltage. Consequently, in addition to presenting a high input impedance and a low noise factor, such an amplifier circuit has a configurable common-mode output voltage and has a lower common-mode gain (e.g., less than unity, approaching zero) than other non-inverting differential amplifiers.

A line driver circuit includes a first input terminal, a second input terminal, a first input stage, a second input stage, a first output stage, and a second output stage. The first input stage includes a first input coupled to the first input terminal, and a second input coupled to the second input terminal. The second input stage includes a first input coupled to the first input terminal, and a second input coupled to the second input terminal. The first output stage includes a first input coupled to a first output terminal of the first input stage and a second input coupled to a first output terminal of the first input stage. A second output stage includes a first input coupled to a second output terminal of the first input stage and a second input coupled to a second output terminal of the first input stage.

A programmable a fully-differential programmable gain amplifier for reducing distortion, switching transients and interference, and improving bandwidth. In one embodiment, the amplifier includes a programmable gain module, an amplifier coupled to the current mode outputs and a data latch circuit of the programmable gain module, the amplifier configured to apply common mode voltage to the data latch circuit, and a current-to-voltage converter. In one embodiment, the fully-differential programmable gain amplifier controls distortion and switching interference during amplification by sensing common mode signals to produce an error signal, and applying the resulting error signal to the programmable gain module for multiplying digital to analog conversion. Components of the fully-differential programmable gain amplifier provide compensation of distortion caused by nonlinearity of device switches and switch resistance, and can include a floating supply, galvanic isolation of control signals and a common mode voltage controller.

This application relates to methods and apparatus for operating MEMS sensors, in particular MEMS capacitive sensors (C.sub.MEMS) such as a microphones. An amplifier apparatus is arranged to amplify an input signal (V.sub.INP) received at a sense node from the MEMS capacitive sensor. An antiphase signal generator generates a second signal (V.sub.INN) which is in antiphase with the input signal (V.sub.INP) and an amplifier arrangement is configured to receive the input signal (V.sub.INP) at a first input and the second signal (V.sub.INN) at a second input and to output corresponding amplified first and second output signals. This converts a single ended input signal effectively into a differential input signal.