Patent classifications
H03F2203/45458
MATRIX POWER AMPLIFIER
A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.
Matrix power amplifier
A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.
TWO-DIMENSIONAL HIGH-SPEED EQUALIZER WITH PROGRAMMABLE DIRECT CURRENT (DC) AND PEAKING GAINS
Embodiments of equalizers are disclosed. In an embodiment, an equalizer includes a first signal path segment that includes a first plurality of serially connected transistors and current sources, a second signal path segment that includes a second plurality of serially connected transistors and current sources, and at least one termination resistor connected to the first and second signal path segments. The first plurality of serially connected transistors and current sources includes a first current source and a second current source connectable to a reference voltage and a first transistor and a second transistor connected between input terminals of the equalizer and the first and second current sources, where the first signal path segment further includes at least one resistor connected between the first and second current sources.
POWER AMPLIFIER WITH NULLING MONITOR CIRCUIT
Techniques for monitoring a distortion signal of a power amplifier circuit, where the output of a distortion monitoring circuit includes little or no fundamental signal and closely represents the actual distortion of the amplifier circuit of a wired communications system. The power amplifier circuit can generate a distortion feedback signal that does not affect the power amplifier's output power capability, e.g., no inherent loss in the fundamental output of the amplifier. That is, using a distortion monitor circuit, the power amplifier circuit can resolve a distortion feedback signal from the intended output signal of the output power amplifier circuit.
Continuous time linear equalizer with two adaptive zero frequency locations
The present invention is directed to electrical circuits. More specifically, embodiments of the presentation provide a CTLE module that includes a two compensation sections. A high-frequency zero RC section is in the source of the differential pair and close to the bias current source. A low-frequency zero section is coupled to an output terminal and configured outside the input signal path. A DC gain tuning section is coupled to the low-frequency zero section. There are other embodiments as well.
Two-dimensional high-speed equalizer with programmable direct current (DC) and peaking gains
Embodiments of equalizers are disclosed. In an embodiment, an equalizer includes a first signal path segment that includes a first plurality of serially connected transistors and current sources, a second signal path segment that includes a second plurality of serially connected transistors and current sources, and at least one termination resistor connected to the first and second signal path segments. The first plurality of serially connected transistors and current sources includes a first current source and a second current source connectable to a reference voltage and a first transistor and a second transistor connected between input terminals of the equalizer and the first and second current sources, where the first signal path segment further includes at least one resistor connected between the first and second current sources.
Power amplifying apparatus with boost function
A power amplifying apparatus includes a control circuit generating a bias voltage and generating a control signal using a battery voltage and a reference voltage, and a power amplifying circuit boosting the battery voltage according to the control signal to provide an operating voltage, and operating according to the bias voltage and the operating voltage to amplify an input signal, wherein the power amplifying circuit detects the operating voltage and provides a detection voltage to the control circuit, and the control circuit controls the control signal according to the detection voltage.
Fast settling capacitive gain amplifier circuit
A capacitive gain amplifier circuit amplifies an input signal by a pair of differential amplifier circuits couples in series. The first differential amplifier circuit is reset during an autozero phase while disconnected from the second differential amplifier circuit, and the first and second differential amplifier circuits are connected together in series during a chop phase. A set of feedback capacitors is selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the chop phase.
CONTINUOUS TIME LINEAR EQUALIZER WITH TWO ADAPTIVE ZERO FREQUENCY LOCATIONS
The present invention is directed to electrical circuits. More specifically, embodiments of the presentation provide a CTLE module that includes a two compensation sections. A high-frequency zero RC section is in the source of the differential pair and close to the bias current source. A low-frequency zero section is coupled to an output terminal and configured outside the input signal path. A DC gain tuning section is coupled to the low-frequency zero section. There are other embodiments as well.
POWER AMPLIFYING APPARATUS WITH BOOST FUNCTION
A power amplifying apparatus includes a control circuit generating a bias voltage and generating a control signal using a battery voltage and a reference voltage, and a power amplifying circuit boosting the battery voltage according to the control signal to provide an operating voltage, and operating according to the bias voltage and the operating voltage to amplify an input signal, wherein the power amplifying circuit detects the operating voltage and provides a detection voltage to the control circuit, and the control circuit controls the control signal according to the detection voltage.