A dual amplifier apparatus is disclosed. The apparatus includes an energy module having a controller and a first and second power amplifier circuit coupled to the controller. The first and second power amplifier circuits are configured to receive and amplify an input signal to generate a first output signal into a load coupled to the output of the first and second power amplifier circuit. A power rating of the first amplifier circuit is different from a power rating of the second amplifier circuit. The controller is configured to select the first or the second power amplifier circuit.

Differential amplifier circuitry including: first and second main transistors of a given conductivity type: and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.

A voltage controlled oscillator (VCO) is disclosed. The VCO includes an active device. The VCO comprises an active device, wherein the active device further includes an n-type transistor having a drain, gate and bulk; a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor share a common source. The active device further includes a first capacitor coupled between the gate of n-type transistor and the gate of p-type transistor; a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor; and a third capacitor coupled between the bulk of n-type transistor and the bulk of p-type transistor. The VCO includes a tuning block coupled to the common source to form a common gate amplifier and at least one tuning element coupled to the active device for changing the overall capacitance of the VCO.

The isolated port of a 0/90 degree coupler is terminated by a novel complex termination impedance circuit having a reactance. The absolute value of the reactance is at least two ohms. The coupler receives a signal on its input port, and outputs a first signal on its first output port and a second signal on its second output port. A first load is coupled to the first output port without an intervening matching network. A substantial impedance mismatch exists between the first output port and the first load. A second load is coupled to the second output port without an intervening matching network. A substantial impedance mismatch exists between the second output port and the second load. Despite the substantial impedance mismatches, the first and second signals have a phase difference in a range of from 88 degrees to 92 degrees while exhibiting an amplitude imbalance less than 2 dB.

A power amplifier (PA) linearization technique with a wider linearized power range is proposed. Proposed two types of linearizers with cross-coupled PMOS and NMOS configuration. The idea is to use a complimentary device compared with the PA core device, and the behavior of Cgs of the linearizer are also complimentary to the PA itself. In the other words, the overall Cgs of the PA with the linearizer would be constant without leading to non-linear waveform. Both linearizers can effectively compensate not only AMAM but also AMPM. First type of linearizer can be integrated with PA cores, and second type of linearizer can be used in the IMN. Both linearizers have effective IM3 reduction in different corner.

An amplifier comprises a common emitter stage coupled to a first and a second input, a common base stage coupled to the common emitter stage and to a first and a second output, and a cancellation path coupled to the common emitter stage and the common base stage and to the first and second outputs. The cancellation path generates a first cancellation signal that is 180 degrees out of phase with a first leakage signal at the first output and a second cancellation signal that is 180 degrees out of phase with a second leakage signal at the second output. The cancellation path comprises a first cancellation transistor coupled to the common emitter stage and the common base stage and to the first output and a second cancellation transistor coupled to the common emitter stage and the common base stage and to the second output.

An electronic device including an amplifier which includes a first transistor configured to receive an input signal through a gate terminal thereof and having a source terminal electrically connected to ground, a second transistor configured to transmit an output signal through a drain terminal thereof and having a gate terminal electrically connected to the ground, and a switch electrically connected to the gate terminal of the second transistor and configured to switch a voltage being supplied to the gate terminal of the second transistor in accordance with turn-on or turn-off of the amplifier.

An amplifier may include control circuitry that may track a first input signal parameter and, in response, adjust a value of a second input parameter. Input parameter tracking and adjustment may facilitate control of output parameters for the amplifier. For example, an envelope-tracking amplifier may track input signal amplitude and adjust other input parameters in response. The adjustments may facilitate control of output parameters, such as gain or efficiency. The amplifier may further include calibration circuitry to determine adjustment responses to various tracked input parameters.

A data transmitter includes: a plurality of parallel driver slices, a first slice of the plurality of parallel driver slices having a first signal generator circuit with a first transistor coupled to a data signal and in series with a second transistor coupled to a first bias signal; and a first bias circuit including a third transistor and a fourth transistor in series with a first current source, the first bias circuit further including a first operational amplifier (op amp) having a first input coupled to a first reference voltage and a second input coupled between the fourth transistor and the first current source, an output of the first op amp configured to provide the first bias signal to the second transistor and to the third transistor.