Patent classifications
H03F2203/45551
VOLTAGE AMPLIFIER BASED ON CASCADED CHARGE PUMP BOOSTING
Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.
AMPLIFIER AND METHOD FOR CONTROLLING COMMON MODE VOLTAGE OF THE SAME
The present application discloses an amplifier and a method for controlling a common mode voltage thereof. The method includes: generating a control signal according to a positive-terminal input signal, a negative-terminal input signal and a target common mode voltage; and coupling the controlling signal to a first terminal of a positive-terminal capacitor and a first terminal of a negative-terminal capacitor, to adjust degree of conduction of a positive-terminal p-type transistor and degree of conduction of a negative-terminal p-type transistor, or to adjust degree of conduction of a positive-terminal n-type transistor and degree of conduction of a negative-terminal n-type transistor, thereby changing a common mode voltage.
Methods and Apparatus of Adaptive and Automatic Adjusting and Controlling for Optimized Electrometer Analog Signal Linearity, Sensitivity, and Range
A signal processing assembly for a detector includes a signal amplifier, a control unit, and an offset control module. The signal amplifier is configured to receive an input signal from the detector assembly and to provide an output signal. The control unit is configured to compare a first data point from the output signal with a signal range, and to generate an input bias control signal based upon the comparison. The offset control module is coupled with the control unit and configured to receive the input bias control signal. The offset control module includes a power supply operatively coupled with an input of the signal amplifier, and the offset control module is configured to generate and apply an adaptive input offset signal at the input of the signal amplifier based upon the input bias control signal.
Calibration circuit for use in sensor and related sensor thereof
A calibration circuit configured to calibrate a signal of a sensing unit comprises: an amplifier, a first impedance element and a second impedance element. The amplifier has a first input terminal, a second input terminal and an output terminal. The first input terminal is coupled to a first terminal of the sensing unit, the second input terminal is coupled to a reference voltage, and the output terminal is feedback to the first input terminal and outputs the readout signal. A first terminal of the first impedance element is coupled to the first input terminal of the amplifier, and a second terminal of the first impedance element is coupled to a calibration voltage. A first terminal of the second impedance element is coupled to the first terminal of the first impedance element, and a second terminal of the second impedance element is coupled to the output terminal of the amplifier.
Voltage amplifier based on cascaded charge pump boosting
Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.
Gain-boosted class-AB differential residue amplifier in a pipelined Analog-to-Digital Converter (ADC) using switched-capacitor common-mode feedback to eliminate tail current sources
A differential residue amplifier fits between Analog-to-Digital Converter (ADC) stages. Switched-Capacitor Common-Mode Feedback circuits determine voltage shifts. An AC-coupled input network uses switched capacitors to shift upward voltages of the differential inputs to the residue amplifier to apply to an upper pair of p-channel differential transistors with sources connected to the power supply. The AC-coupled input network also shifts downward in voltage the differential inputs to the residue amplifier to apply to a lower pair of n-channel differential transistors with grounded sources. The drains of the p-channel differential transistors connect to differential outputs through p-channel cascode transistors. N-channel cascode transistors connect the drains of the n-channel differential transistors to the differential outputs. The drains of differential transistors can be input to differential amplifiers to drive the gates of the cascode transistors for gain boosting. No tail current is used, allowing for wider output-voltage swings with low supply voltages.
VARIABLE-GAIN AMPLIFIER, CORRESPONDING DEVICE AND METHOD
A circuit includes an amplifier and a feedback network coupled between the input and the output of the amplifier. The feedback network includes a plurality of parallel coupled branches, each branch having a first selection switch coupled to the input, a second selection switch coupled to the output, and an impedance between the first and second selection switches. Each branch includes a plurality of signal feedback paths coupled in parallel, each having a tuning switch coupled between the first selection switch and the second selection switch of that branch. A control unit is coupled to the feedback network and configured to vary a gain of the amplifier by selectively placing the first and second selection switches of each branch in a conductive state or a non-conductive state and selectively activating respective tuning switches of any branch having first and second selection switches in the conductive state.
Methods and apparatus of adaptive and automatic adjusting and controlling for optimized electrometer analog signal linearity, sensitivity, and range
A signal processing assembly for a detector includes a signal amplifier, a control unit, and an offset control module. The signal amplifier is configured to receive an input signal from the detector assembly and to provide an output signal. The control unit is configured to compare a first data point from the output signal with a signal range, and to generate an input bias control signal based upon the comparison. The offset control module is coupled with the control unit and configured to receive the input bias control signal. The offset control module includes a power supply operatively coupled with an input of the signal amplifier, and the offset control module is configured to generate and apply an adaptive input offset signal at the input of the signal amplifier based upon the input bias control signal.
SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF
A semiconductor device including an amplifier with improved accuracy is provided. The semiconductor device includes a switch, a capacitor, a chopping circuit, and the amplifier. The amplifier includes a non-inverting input terminal, an inverting input terminal, an inverting output terminal, and a non-inverting output terminal. The semiconductor device, with use of the switch and the capacitor, has a function of sampling and holding a first potential and a second potential input in a first period. The chopping circuit is provided on each of the input terminal side and the output terminal side of the amplifier, and the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverting input terminal in a second period. In a third period, the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverted input terminal, which is different from the second period. In a similar manner, the inverting output terminal and non-inverting output terminal are replaced by the chopping circuit in the second period and the third period to be output from the semiconductor device.
Neural-signal amplifier and multi-channel neural-signal amplifying system
A neural-signal amplifier includes an amplifier, a switched-capacitor circuit-input unit, a switched-capacitor feedback-circuit unit, and a switched-capacitor circuit-output unit. Each of the switched-capacitor circuit-input unit, the switched-capacitor feedback-circuit unit, and the switched-capacitor circuit-output unit includes a plurality of differential switches, a plurality of common mode switches, and a plurality of capacitors. By controlling the switches to turn on or performing the switched-capacitor operation, the neural-signal amplifier is controlled to suppress the DC drift and reconstruct the DC input of the common-mode power supply.